Boki said:
Ya, I believe it.
However, I think the effect should very small, or should be de-effect
by other components.
It seems our module try to adjust digital algorithm to fit the
changes.
However, I can't make sure that.
Boki.
The carrier frequency will normally be generated with a PLL so it will be
locked to a crystal. Since it has a crystal oscillator, it will probably
re-tune itself using the crystal as the reference frequency to adjust the
L-C circuits. These things have to be made so that they will work with
maybe 20% manufacturing tolerance on the capacitors so the automatic
adjustment facility is already needed anyway in many cases. The inductance
value of the on-chip inductors is defined by lithography so it is very
accurate and stable but the capacitor tolerance is set by the thickness of
deposited layers and hence the wide tolerance. The series resistance of
the inductors (and hence the Q) is quite temperature dependent, like the
resistivity of most metals. They might calibrate this out as well.
Chris
