Tapeout question for the older IC designers around here

[Joel Kolstad]

According to Wikipedia:

GDSII files are considered to be the final output of the IC design cycle and
are passed to IC foundries for IC fabrication. These GDSII files were
originally produced on magnetic tapes, hence the final moment of the IC design
process became known as tapeout.

---

I always thought it was called "tapeout" because, long ago, you literally
taped out your design on rubylith or similar at, e.g., 10x scale before it was
photimaged down to the real IC size.

Not so?

---Joel

 

[Jim Thompson]

According to Wikipedia:

GDSII files are considered to be the final output of the IC design cycle and
are passed to IC foundries for IC fabrication. These GDSII files were
originally produced on magnetic tapes, hence the final moment of the IC design
process became known as tapeout.

---

I always thought it was called "tapeout" because, long ago, you literally
taped out your design on rubylith or similar at, e.g., 10x scale before it was
photimaged down to the real IC size.

Not so?

---Joel

I think it refers to the magnetic tape, because the GDSII was what was
called "tapeout"... though they're usually on CD or DVD now-a-days ;-)

...Jim Thompson

 

[Ben Bradley]

According to Wikipedia:

GDSII files are considered to be the final output of the IC design cycle and
are passed to IC foundries for IC fabrication. These GDSII files were
originally produced on magnetic tapes, hence the final moment of the IC design
process became known as tapeout.

---

I always thought it was called "tapeout" because, long ago, you literally
taped out your design on rubylith or similar at, e.g., 10x scale before it was
photimaged down to the real IC size.

Not so?

My understanding is (was?) the early designs were done much like
multilayer printed circuit boards (perhaps before there were
multilayer boards), with black tape hand-applied to clear film, and a
somewhat greater (okay, MUCH greater) photographic reduction than 10:1
was used to get to the actual IC size. This pic looks like it:

http://www.national.com/rap/Horrible/widlar.html

Of course, you could 'correct' the Wikipedia article and then see
what it eventually says...

 

[Jim Thompson]

My understanding is (was?) the early designs were done much like
multilayer printed circuit boards (perhaps before there were
multilayer boards), with black tape hand-applied to clear film, and a
somewhat greater (okay, MUCH greater) photographic reduction than 10:1
was used to get to the actual IC size. This pic looks like it:

http://www.national.com/rap/Horrible/widlar.html

Of course, you could 'correct' the Wikipedia article and then see
what it eventually says...

The "standard" scale is 400X.

"Tapeout" =/= "Tapeup"

"Tapeout" has always referred to the GDSII file that had been checked
against DRC rules.

...Jim Thompson

 

[Sjouke Burry]

According to Wikipedia:

GDSII files are considered to be the final output of the IC design cycle and
are passed to IC foundries for IC fabrication. These GDSII files were
originally produced on magnetic tapes, hence the final moment of the IC design
process became known as tapeout.

---

I always thought it was called "tapeout" because, long ago, you literally
taped out your design on rubylith or similar at, e.g., 10x scale before it was
photimaged down to the real IC size.

Not so?

---Joel

All my designs were 1:1 ,then make a contactcopy
in reverse on film, and expose/etch the print.
No such luxury as computers,etcetera ahem......

 

[Rich Grise]

On Wed, 13 Sep 2006 14:26:56 -0700, "Joel Kolstad"


My understanding is (was?) the early designs were done much like
multilayer printed circuit boards (perhaps before there were
multilayer boards), with black tape hand-applied to clear film, and a
somewhat greater (okay, MUCH greater) photographic reduction than 10:1
was used to get to the actual IC size. This pic looks like it:

http://www.national.com/rap/Horrible/widlar.html

Of course, you could 'correct' the Wikipedia article and then see
what it eventually says...

I once saw an article in BYTE or something, about the making of the
6809 processor. One of the main photos was of a few guys standing in
front of this artwork on the wall, about 8' high by about 9' wide,
which was allegedly the whole chip.

That, I think I'd call a tape-up. ;-)

Cheers!
Rich

 

[Jim Thompson]

All my designs were 1:1 ,then make a contactcopy
in reverse on film, and expose/etch the print.
No such luxury as computers,etcetera ahem......

On an IC? Nonsense... unless your feature size was gross. Even back
in the '60's we did 100u feature sizes.

...Jim Thompson

 

[Eeyore]

On an IC? Nonsense... unless your feature size was gross. Even back
in the '60's we did 100u feature sizes.

100u what ? Inch ?

Graham

 

[Jim Thompson]

On an IC? Nonsense... unless your feature size was gross. Even back
in the '60's we did 100u feature sizes.

Pardon my off-the-top-of-my-head math...

It was 0.25mil ~= 6u feature size. That's hard to do with tape ;-)

...Jim Thompson

 

[[email protected]]

According to Wikipedia:

GDSII files are considered to be the final output of the IC design cycle and
are passed to IC foundries for IC fabrication. These GDSII files were
originally produced on magnetic tapes, hence the final moment of the IC design
process became known as tapeout.

---

I always thought it was called "tapeout" because, long ago, you literally
taped out your design on rubylith or similar at, e.g., 10x scale before it was
photimaged down to the real IC size.

Not so?

---Joel

What I don't like about that wiki is the GDS files went to the mask
shop, not the foundry, since few companies make their own tooling.

I always thought the final moment of IC design is passing QA. Any fool
can design, but delivering a manufacturable product is another story.
[Pass latch-up, ESD, decent yield, data sheet complete, blah blah blah]

 

[Keith]

The "standard" scale is 400X.

"Tapeout" =/= "Tapeup"

My understanding was that "tapeout" was originally the manual
taped-up drawing, released to manufacturing.

"Tapeout" has always referred to the GDSII file that had been checked
against DRC rules.

We call that a RIT (Release Interface Tape), though they've been
electronic "tapes" for thirty years. RIT-A is the silicon, and
RIT-B is the metal. "The chip RIT on time (!!!yeah!!!,
congratulations - now back to the salt mines)".

 

[Ancient_Hacker]

I always thought it was called "tapeout" because, long ago, you literally
taped out your design on rubylith or similar at, e.g., 10x scale before it was
photimaged down to the real IC size.

Not so?

---Joel

I recently asked Bob Pease about this very thing. I suspected
"tapeout" referred back to the old rubylith layout method.

He went and asked some real old-time IC designers.

They say "tapeout" referred to the magnetic tape, not the rubylith.

Another myth busted.

 

[Jim Thompson]

[email protected] says... [snip]

The "standard" scale is 400X.

"Tapeout" =/= "Tapeup"

My understanding was that "tapeout" was originally the manual
taped-up drawing, released to manufacturing.

"Tapeout" has always referred to the GDSII file that had been checked
against DRC rules.

We call that a RIT (Release Interface Tape), though they've been
electronic "tapes" for thirty years. RIT-A is the silicon, and
RIT-B is the metal. "The chip RIT on time (!!!yeah!!!,
congratulations - now back to the salt mines)".

I think that's peculiar to IBM. I've _never_ heard that terminology
before... I repeat...

"Tapeout" has always referred to the GDSII _file_ that had been
checked against DRC rules.

And I've been at this stuff for more than 44 years.

...Jim Thompson

 

[Jim Thompson]

I recently asked Bob Pease about this very thing. I suspected
"tapeout" referred back to the old rubylith layout method.

He went and asked some real old-time IC designers.

Is there anyone older than Pease ? He graduated MIT the year
before me... 1961, I'm Class of 1962.

They say "tapeout" referred to the magnetic tape, not the rubylith.

Another myth busted.

Yep. Agreed.

...Jim Thompson

 

[Keith]

[email protected] says... [snip]

The "standard" scale is 400X.

"Tapeout" =/= "Tapeup"

My understanding was that "tapeout" was originally the manual
taped-up drawing, released to manufacturing.

"Tapeout" has always referred to the GDSII file that had been checked
against DRC rules.

We call that a RIT (Release Interface Tape), though they've been
electronic "tapes" for thirty years. RIT-A is the silicon, and
RIT-B is the metal. "The chip RIT on time (!!!yeah!!!,
congratulations - now back to the salt mines)".

I think that's peculiar to IBM. I've _never_ heard that terminology
before...

It is. IBM did automatic mask generation before others, so the
differing terminology isn't surprising.

I repeat...

"Tapeout" has always referred to the GDSII _file_ that had been
checked against DRC rules.

....learn something new every day. You (and Ancient_Hacker) have
convinced me. I thought the term was older.

And I've been at this stuff for more than 44 years.

GDSII? ;-)

 

[Michael A. Terrell]

[email protected] says... [snip]

The "standard" scale is 400X.

"Tapeout" =/= "Tapeup"

My understanding was that "tapeout" was originally the manual
taped-up drawing, released to manufacturing.

"Tapeout" has always referred to the GDSII file that had been checked
against DRC rules.

We call that a RIT (Release Interface Tape), though they've been
electronic "tapes" for thirty years. RIT-A is the silicon, and
RIT-B is the metal. "The chip RIT on time (!!!yeah!!!,
congratulations - now back to the salt mines)".

I think that's peculiar to IBM. I've _never_ heard that terminology
before...

It is. IBM did automatic mask generation before others, so the
differing terminology isn't surprising.

On the other hand, IBM had no problem getting enough computer time.

...learn something new every day. You (and Ancient_Hacker) have
convinced me. I thought the term was older.


GDSII? ;-)

--
Service to my country? Been there, Done that, and I've got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida

 

[John Woodgate]

In message <[email protected]>, dated Thu, 14

Is there anyone older than Pease ? He graduated MIT the year before
me... 1961, I'm Class of 1962.

There must be, I would think. I don't have time to go back to get dates
for G W A Dummer etc., but early experimental ICs date from the 50s
(excluding Loewe tubes, of course), and some people still alive would
have worked on them. They may not still be active in electronics, of
course.

 

[Nico Coesel]

On an IC? Nonsense... unless your feature size was gross. Even back
in the '60's we did 100u feature sizes.

LOL! Reminds me of a stupid error I made in digital IC design class
(yes, using a computer). I forget to put the unit u somewhere so the
simulation package complained: "Warning: your MOSFET Q5 is 10cm wide,
are you really sure about this?"

 

[Keith]

[snip]

The "standard" scale is 400X.

"Tapeout" =/= "Tapeup"

My understanding was that "tapeout" was originally the manual
taped-up drawing, released to manufacturing.

"Tapeout" has always referred to the GDSII file that had been checked
against DRC rules.

We call that a RIT (Release Interface Tape), though they've been
electronic "tapes" for thirty years. RIT-A is the silicon, and
RIT-B is the metal. "The chip RIT on time (!!!yeah!!!,
congratulations - now back to the salt mines)".

I think that's peculiar to IBM. I've _never_ heard that terminology
before...

It is. IBM did automatic mask generation before others, so the
differing terminology isn't surprising.

On the other hand, IBM had no problem getting enough computer time.

Well, at least on the first order. Consider that work expands to
fill the (compute) time given. In the '70s a friend was forced to
do MonteCarlo transient analysis on a circuit he was designing. It
took many weekends on several dedicated mainframes for him to run
the number of simulations that were requested. The bill, even
though it was blue money, was rather large. A total waste of
cycles.

 

[[email protected]]

Is there anyone older than Pease ? He graduated MIT the year
before me... 1961, I'm Class of 1962.


Yep. Agreed.

...Jim Thompson

Bob used to sell his books out of the trunk of his VW at the Foothill
Electronics flea market. Those were the days. I regret not
photographing some of these silicon valley classics....