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Schmitt trigger relaxation oscillator

Hey everyone, was hoping to have some help with two questions I have for the same circuit!
Any help would be appreciated.
here's the circuit in question
Z5JHKQZ.png

Say that a 5V top rail is connected to both the trigger inverter and the diode (where there is a switch before the diode connected to 0V, meaning the diode can receive 0V when the trigger receives 5V). I understand that when there is 0V at the anode of the diode and 5V given to the trigger, there will be 0.7V at the input of the trigger.. I know this is something to do with the diode, but why at the input?

Also my other question is that supposedly the upper trip point of a Schmitt trigger when given 5V is 2.8V. However I also thought this was meant to be 66% of the voltage given to the trigger from the rail... and that 2.8 isn't 66% of 5? or am i completely wrong? so I would've thought that say 10V was given to the trigger, the upper trip point would be 10x0.66 = 6.6 (66%). please help! sorry if this makes no sense at all haha, that's the trouble when you don't really know what you're talking about :p
 
According to my SGS-Thompson book, the trigger points are 1.8v and 3V for the 4093 with 5V supply.
The hysteresis is not a constant percentage of the supply voltage, it goes up with a rise in Vdd. At 18Vdd the trigger points are shown as 7V and 10.5V The frequency will therefore be dependant on supply voltage.

If the diode cathode is connected to the 5V positive, it will not pass current so the schmitt will oscillate with the capacitor going from lower trigger point to upper trigger point and vice versa.

Connecting the diode to 0V will hold the capacitor to about 0.6V which will be below the lower trigger point and the oscillator will not run. If you use a 2-input schmitt (4093), one input can be used for the oscillator and the other input to act as a switch. A diode will then not be necessary.

The output is normally taken from the schmitt trigger output and will be a square wave. The output can also be taken from the capacitor if a very high impedance load is used. The output will then be triangular.
 
Thank you very much, that's a load of help :)
If you're able to explain, do you know how/why the frequency is dependent on the supply voltage?
thanks again
 
If the hysteresis were constant with supply voltage variation, then the frequency would be constant since the capacitor will be charged and discharged with a current proportional to supply voltage to a voltage proportional to supply voltage..


The hysteresis goes from 12% at 3V to 24% at 18V so the frequency should drop as the supply voltage rises. I have not tried this.
 
The standard transistor Schmidt trigger thresholds are set by combinations of resistors to be a fraction of the supply Voltage, but not necessarily .33 and .66
By choice of the resistor values both thresholds can be set and a variable resistor may be used to adjust them in use.
Because the rate of charge & discharge of the capacitor is also proportional to the supply Voltage, then the frequency of a Schmidt oscillator would be independant of the supply.
I don't know how CMOS implements the "Schmidt trigger" input, but, as Duke says, their trigger points are not necessarily proportional to the supply. (Though from my viewing of a few data sheets, they appear to be approximately so.)

WHY the frequency changes:
The time it takes for a capacitor to charge/discharge through a fixed resistor between any two fractions of the supply Voltage is the same. If a capacitor takes 1 msec to charge from 2V to 3V from a 5V supply, it will take the same 1 msec to charge from 4V to 6V on a 10V supply, because it needs twice the amount of charge to flow and the current is twice as much because the supply is twice as much. So the frequency of a relaxation osc will change with supply if the thresholds, as a fraction of the supply Voltage, change. If the thresholds are a constant fraction of the supply, the osc will be stable.

HOW the frequncy changes: depends on how the thresholds change.
If the % difference gets bigger, the charge time is longer, so the frequency is lower & vice versa. Say the thresholds were2V and 3V at 5V supply (20%), but 4V and 6.1V at 10V (21%), then the frequency would be lower at 10V.
There is a second factor to add, which is that the rate of charge decreases as the Voltage on the capacitor rises (and the rate of discharge decreases as the Voltage on the capacitor falls.) The net effect is that as the thresholds move away from the midpoint, the frequency falls. So 4.1V and 6.1V on the 10V supply would give a lower frequency than 2V and 3V on the 5V supply, even though the % difference is the same.

As for calculating these frequencies you'll have to consult Wikipedia or some such. I used to be able to do it, but my maths is getting rather rusty these days!
There are also other complicating factors. The simple calculation assumes we are charging to V+ and discharging to V-, but in a circuit like yours we are dis/charging from the output of the gate. For CMOS this output is pretty close to the supply rails and is symmetric, but for other technologies (TTL particularly) Vout Hi and Vout Low are not always symmetric.
 
Frankly, it sounded like a homework problem to me. Hence my answer. Have you tried LT Spice? Can you rephrase any lingering questions about the answers you have been given?

John
 
Thank you again! and to duke for clearing things up and everyone else! I was about to ask more and then merlin cleared this all up for me, many thanks! oh and yep the post you linked me to bob was the same coursework! just different question for the second part :p
 
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