Rigol caught with their pants down! (DS1052E Oscilloscope)

[David L. Jones]

As promised, an exposé of an issue with the Rigol DS1052E oscilloscope in my
latest video blog:
http://www.alternatezone.com/eevblog/

Dave.

 

[John Larkin]

As promised, an exposé of an issue with the Rigol DS1052E oscilloscope in my
latest video blog:
http://www.alternatezone.com/eevblog/

Dave.

Do the scopes work?

John

 

[David L. Jones]

You corrected the number of PLLs in the FPGA, how do they get the
clocks' phases aligned?

Beats me.
Could be as simple as fixed tuned gate delay inside the FPGA, or could be
some more complex system that auto-calibrates perhaps.

I'm no expert on digital scopes, but I suppose
the clock frequency changes depending on the time base?

Only when required when the memory is full.
On short memory mode (1GS/s, 16KB) a relay clicks in at 100ns/div and it
tells you it's doing 1GS/s on 50ns/div to 5ns/div.
No such click occurs when in long memory mode (500MS/s 1Mpoints), and it
stays on 500MS/s up to 100ns/div.
The relay is thus most likley switching the input signal between either 5 or
10 ADC's depending upon the requirement.

Do they just drop some ADCs and keep the frequency, thereby permitting
the use of trace delays to get the 100ps delays or what?
Are the GS/s figures real time or equivalent time?

1GS/s real time of course, that's been the selling point of these Rigol
scopes for the last 5 years or so.

I think it is possible Rigol tests the ADCs and bins them in-house. Do
you think they might run the power supply a bit "hotter" to get the
parts to work at higher clocks?

I don't think so, likely they have just done exhaustive testing of these
parts to ensure the work. Binning each one in house would be possible, but
messy.
Perhaps AD are the ones pulling the swifty and charging a huge premium
(almost 3 times) for the exact same part?

Dave.

 

[David L. Jones]

Does this Rigol claim to do 1Gsps on non periodic signals?

Yes, that's always been its big selling point. 1GS/s real-time.

If not
(like other sampling scopes), perhaps they're just sliding the phase
of the A-D's while still clocking them within their rated specs.

It also has a selectable equivalent time sampling mode (up to 10GS/s), but
you have to specifically select this through a menu.
In this mode the 1Mpoint memory comes in at 100ns/div.

Did you ever measure the clocks to the A-D chips?

No, I haven't open my unit. But bet your bottom dollar they are 100MHz,
simply no other way to do it.

Dave.

 

[David L. Jones]

Do the scopes work?

Yep, they work. So Rigol are obviously getting away with it by hook or by
crook.
If AD are deliberately under-speccing their normal chips, then it's a clever
ploy by Rigol to exploit it.

Dave.

 

[Martin Riddle]

Beats me.
Could be as simple as fixed tuned gate delay inside the FPGA, or could
be some more complex system that auto-calibrates perhaps.


Only when required when the memory is full.
On short memory mode (1GS/s, 16KB) a relay clicks in at 100ns/div and
it tells you it's doing 1GS/s on 50ns/div to 5ns/div.
No such click occurs when in long memory mode (500MS/s 1Mpoints), and
it stays on 500MS/s up to 100ns/div.
The relay is thus most likley switching the input signal between
either 5 or 10 ADC's depending upon the requirement.


1GS/s real time of course, that's been the selling point of these
Rigol scopes for the last 5 years or so.


I don't think so, likely they have just done exhaustive testing of
these parts to ensure the work. Binning each one in house would be
possible, but messy.
Perhaps AD are the ones pulling the swifty and charging a huge premium
(almost 3 times) for the exact same part?

Dave.
--

It could have been a purchasing error, that actually works.
Or, the parts marked as 40 don’t meet the specs over temperature for a
100/80 mhz clock.
Perhaps NL specs are not met but Rigol can compensate for the error.
I've seen -40c to 85c parts work beyond the rated specs, with some
additional error.

Cheers

 

[krw]

[email protected] wrote:


Beats me.
Could be as simple as fixed tuned gate delay inside the FPGA, or could be
some more complex system that auto-calibrates perhaps.

Tuning gate delays in an FPGA doesn't work. Routing is over half the
delay and there is no way to fix that part. Every time you "wire" the
part it'll have a different routing and your delays will be off.
Indeed, the idea is to make sure you don't rely on placement or
routing.

<snip>

 

[David L. Jones]

I meant a 50MHz and 100MHz scope up there.

Maybe, and I've mentioned this in a previous blog comment.
There is a chance the 50MHz and 100MHz model front ends are identical except
for maybe some different value parts on the 50MHz model to limit the
bandwidth.
Would be interesting to see both circuits side-by-side.
Given that both sample at 1GS/s and everything else is indentical too,
modding the 50MHz unit might just be possible.

Dave.

 

[David L. Jones]

Umm, no. Ever heard of Nyquist?

Plus to see anything like a signal for your eye's benefit, you're
better off with x10 sampling.

So 100MHz is more on the mark. Does it allow you to simply plot the
points without the "join the dots"?

Yep. You can choose between dots, linear ("join the dots") vector
intepolation, or sinX/x interpolation.

BTW if you had exactly 1GHz going in, and it manged to sneak pass the
front end

That would be a neat trick!

Dave.

 

[David L. Jones]

I have heard of Nyquist, just forgot to apply him in this case

and you forgot about the analog bandwidth too, that's kinda important!

There will be an anti aliasing filter in the front end so you wont see
much if you put in anything close to half the sampling rate = 500Mhz.

Err, the front end bandwidth is only 50MHz!
Kinda hard for any signals higher than that to sneak past, as Ray said.

Dave.

 

[Joerg]

Hey, nowadays I report to The Brat.

I was just going to say, didn't she show an interest in the biz lately
and even do a layout? Remember, she may one day be the one deciding
which nursing home you guys go to ;-)

 

[Joerg]

Have you ever been caught in the situation of one of your over-stressed parts
being changed by the manufacturer in such a way so as to render it unsuitable
for your needs?

Happened to another engineer: Bought tons of 5% capacitors for
production, went into Hilbert shifters. They always hand-picked the 1%
parts out of this lot and used the rest for jelly-bean stuffing. One
balmy summer day they found the first shipment that had a hole smack in
the middle of the Gaussian tolerance curve. Obviously someone had
detected a business opprotunity ... whoops.

 

[David L. Jones]

Have you ever been caught in the situation of one of your
over-stressed parts being changed by the manufacturer in such a way
so as to render it unsuitable for your needs?

I've never been caught with any over-spec parts I've used in the past. It's
always something else in the design that goes the way of the do-do. And of
course it's always the seemingly most innocuous part.

Dave.

 

[Joerg]

Sure production ends on the part and then they look in the stockroom and
find a dusty box of parts, where did they come from? Probably someone
else hand picked parts and sent the rest back for restock!

They couldn't be that brazen unless they'd have gone to great lengths
such as re-belting them all. Because the good ones weren't all in front
section.

 

[Joerg]

[...]

I was just going to say, didn't she show an interest in the biz lately
and even do a layout? Remember, she may one day be the one deciding
which nursing home you guys go to ;-)

She is doing all our PCB layouts and managing engineering [1]. And
doing all our press releases. Not bad for a 22-yo with a minior in
psychology and majors in softball and beer pong.

I asked her a couple of months ago, "Say, do you want this company?"
She thought about it for a few hundred milliseconds and said yes.

Great. I remember a few years ago when you hinted that there wasn't much
hope she'd jump in. For a friend of mine that turned out to be the case.
One of their daughters would have the technical knack to run his
business but it seems she's not very interested. Similar age.

[1] And she does my schematic entry for me. I still draw pencil on
blue-grid D-size vellum.

I do that less and less. Most of the time when a client needs a
re-design I fire up the WP and CAD and have at it. Except when at the
pool, like 30 minutes ago. Two Clearprint 1000HP-4 vellum pads always at
the ready.

 

[Joerg]

Not to be too picky, but why would production end on a profitable 5%
parts line?

Likely selected out before packaging.

He meant by a customer who then sent it back. If the manufacturer did
that there would be no re-stocking process, they do it right off the
conveyor belt.

 

[krw]

I think you can place and wire parts of it by hand to get around some
of it, but it would
still change with temperature, voltage, etc.

You might do it once. You'll never maintain the mess.

Some Xilinx fpgas have programmable delays in the IOs, 64taps each at
1/64th of a ~200MHz (afair)
reference clock. a closed loop keeps the delay constant with temp
etc.

Yes, there is an I/O delay, but it's certainly not that large. There
is also delay in the DLLs on that order, but there are a lot of
restrictions on those (clocks only).

 

[krw]

They couldn't be that brazen unless they'd have gone to great lengths
such as re-belting them all. Because the good ones weren't all in front
section.

We've had stuff put onto reels. There are companies that do this. I
doubt it would be worth it for capacitors, but maybe. My bet is that
it was the manufacturer doing the binning.

 

[Joerg]

[...]

They couldn't be that brazen unless they'd have gone to great lengths
such as re-belting them all. Because the good ones weren't all in front
section.

We've had stuff put onto reels. There are companies that do this. I
doubt it would be worth it for capacitors, but maybe. My bet is that
it was the manufacturer doing the binning.

Yes, I am sure it was the mfg. Profit maximization

 

[Mr.T]

Yes, I am sure it was the mfg. Profit maximization

That is their right of course.
Selecting parts for a higher priced close tolerance sales line is hardly
anything new. As long as some people are prepared to pay for the extra cost
of testing, and as long as all items meet their respective specification
claims, then surely there is no problem. If some people are then unable to
get higher spec at the cheaper price, that is just their bad luck surely?

MrT.