Process Corner Variation in analog circuit design.

[Alex_Bam]

Hello,
I have designed an LPF demodulator. In a normal situation it's working fine, however when i carried out the Process corner simulation, the threshold voltage of MOSFET changes which is obvious, due to which MOSFET's operation region changes, ultimately change the output.

My question is :
1-How to deal with the process corner variation?

Note: I have attached the simulation circuit along with the table which illustrates variations in : Threshold voltage, Id, and region during different process corners.
Region: 0 "cutoff"; 1 "linear"; 2 "saturation"; 3 "subth"
Process Corners:
tm = Normal situation
wp = worst-case power
ws = worst-case speed
wo = worst case one
wz = worst-case zero
Thanks.

 

[Harald Kapp]

1-How to deal with the process corner variation?

This is an issue not limited to integrated circuit design but to any design: make the design resilient so it will stand up to specs under worst case conditions.
This usually involves some kind of compensation, feedback loops, using ratiometric circuits that are insensitive to absolute values etc. What you can use will depend on the specific circuit being considered. Look up "worst case design" to find more information on the topic.