Problems with composite video generation!

[PauloConstantino]

Hi friends,

I have finished a circuit that generates composite video and it's almost*** working perfectly. Apart from some ultra weird problem that is occurring when data is displayed. Basically the system sweeps the RAM from address 0 to a certain final address. Each line is 8 pixels in height. Basically it displays 6 lines, and then suddenly it stops displaying, then after a few lines, it starts displaying again.

I have checked the logic of my circuit and everything seems fine. I'm outputting VSYNC for 4 lines. Each line is 0.64us. So VSYNC is 256us long.

Each line has 4.5us HSYNC, and a few microseconds blank. At the end of a line, more blanks are added.

I am using a shift register that is loaded every 8 bits, and then clocked at 8MHz to display the pixels. It seems the shift register is not loading sometimes. Yet my logic for its loading is correct. Has this problem ever occurred with you? Do you have any ideas what this could be? Or any ideas of how I could troubleshoot this? I really don't know what to do anymore. I've checked all connections and they're all fine.

Here's a photo of what the TV is displaying right now. As you can see it goes nutty after 6 lines. It does look like a logic problem, that is, the shift register loading logic is flawed, but I have checked it and rechecked it and it seems correct.


Edit: I have found out that the Shift register is actually loading. But it's somehow loading wrong addresses. The address is generated with a counter, which increments everytime the shift register loads. The counter is working correctly. I am starting to think that the address pins on the ROM are somehow messed up? Could it be that the connections shown on the datasheet are incorrect? I am using the atmel AT28C256...

 

[AnalogKid]

The data sheets are correct.
What is the counter part number?

ak

 

[PauloConstantino]

Hi AK. Thanks for your help. You are really everywhere If you mean the part number at the bottom it's A8802A19802C I really can't read it much because it's really faint...

 

[PauloConstantino]

There is one weird thing that happens also, If I add more data to the RAM rather than blank data, what happens on the TV is, it displays 6 lines then goes blank, then after 5/6 lines, it starts displaying again as the photo shows, but then if I add more data, it starts displaying it on the blank area! This does look like the addresses are messed up but again they are following the data sheet...

 

[PauloConstantino]

This is what happens when I add more data to the ROM...

 

[AnalogKid]

If you mean the part number at the bottom it's A8802A19802C I really can't read it much because it's really faint...

That is not a TTL, CMOS, or ECL logic part number. Is the counter referred to pin post #1 a physical part or is it implemented in firmware?

ak

 

[OBW0549]

Post a schematic of your circuit so we're not having to guess blindly; until you do, we cannot give you an answer any more definitive than "obviously, you've done something wrong."

Once we see a schematic, we might be able to help you figure out what that "something" is. Without one, we'd just be wasting our time and effort.

 

[PauloConstantino]

That is not a TTL, CMOS, or ECL logic part number. Is the counter referred to pin post #1 a physical part or is it implemented in firmware?

ak

Ops my bad. Thought you were talking about the ROM. The counter is a 74HC4040, two of them cascaded together to give 14 bits.

 

[PauloConstantino]

It seems like the screen is being divided into smaller screens!

 

[AnalogKid]

The 4040 is a ripple counter. There can be a significant delay between the time of a clock edge and the time when all outputs are stable. Of course, this is worse when two 4040's are cascaded.

ak

 

[PauloConstantino]

The 4040 is a ripple counter. There can be a significant delay between the time of a clock edge and the time when all outputs are stable. Of course, this is worse when two 4040's are cascaded.

ak

I am using 4040 for all sync outputs, but I send the values to a register to stabilize them before using. It works fine for the sync pulses. If there was a problem with the counter it would mess up all lines not only those after the 6th line.... Right ?


Bleh I give up

 

[PauloConstantino]

This is what the scope shows. As you can see, after a certain time, the values on the lines stop showing.
This indicates the shift register is loading the wrong values... Because I have it set so that when it's empty it loads HIGH rather than LOW bits. Since it's showing up LOW bits, it must be loading wrong values from RAM...

 

[PauloConstantino]

I have a counter counting from 0 to 512*312 = 159744. This is 159744 pixels each 125ns in length.

My logic to load the shift register is as follows:

(P8 + P7) AND NOT(P8P7P6) AND NOT(P0 + P1 + P2) AND (P17 + P16 + P15 + P14)

Pn is each bit from the counter, going from P0 to P17.

The first 8 bits count pixels on each line, the last (most significant ) 8 bits are counting lines...

P8 + P7 means the pixel count must be at least 128 on each line.
NOT(P8P7P6) means the pixel count on each line must be less than 448.
NOT(P0 + P1 + P2) means the first three bits must be 0.
(P17 + P16 + P15 + P14) means the count must be at least 16384 to account for VSYNC and VBLANK lines...



I can't see a flaw in it... Is there one?

 

[OBW0549]

I can't see a flaw in it... Is there one?

Who the heck can possibly tell?

Post a complete, accurate schematic of your circuit, and then we can begin trying to figure out what is going wrong.

 

[PauloConstantino]

I'll create a schematic and post. I don't have one at the moment.

 

[PauloConstantino]

I

CANT
BELIEVE
IT

MY PROBLEM
HAS BEEN
JUST

SOLVED!!!!!!!!!!

 

[PauloConstantino]

I WAS USING THE 12TH BIT OF THE COUNTER AS AN INPUT TO THE SECOND COUNTER.

But I was inverting it before sending, because I had a problem with it before and it was solved by inverting it.

What is this!!!!

 

[PauloConstantino]

Who the heck can possibly tell?

Post a complete, accurate schematic of your circuit, and then we can begin trying to figure out what is going wrong.

I love you. You solved my problem without knowing it

 

[OBW0549]

I love you. You solved my problem without knowing it

Excellent. This, by the way, is why people are so insistent on seeing schematics: they make design flaws much, MUCH easier to spot. Without them, finding a problem can often be nearly impossible.

Good luck with your project.

 

[PauloConstantino]