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PowerPC boot sequence

R

RFrutos

Hello,
I'm working with a PowerPC MPC8248 in a "selfmade" prototype board and
I'm trying to boot it from a boot flash. I understand quite well that
after reset the MPC8248 reads the configuration word, in my case from
a CPLD. But what I don't understand is what does the MPC8248 do just
after reading the configuration word. In what address does it start
executing code?
 
G

Greg Neff

Hello,
I'm working with a PowerPC MPC8248 in a "selfmade" prototype board and
I'm trying to boot it from a boot flash. I understand quite well that
after reset the MPC8248 reads the configuration word, in my case from
a CPLD. But what I don't understand is what does the MPC8248 do just
after reading the configuration word. In what address does it start
executing code?

After the PPC reads the HRCW, the start of execution is controlled by
the CIP bit. This defines the most significant 12 bits of the
exception handler address. These address bits can be all ones or all
zeroes, depending on the state of the CIP bit.

Now you have to look at the "Exceptions and Conditions" table in the
user's manual. You will see that the vector for system reset is
0x00100. So, depending on the state of CIP, the PPC will fetch its
first instruction at either 0x00000100 or 0xFFF00100. You shouldn't
do too much here because you don't have much space (256 bytes). What
you should do is jump to your hardware initialization routine.

You should insert at least rudimentary handlers for all of the
possible exceptions, so that you don't go out to left field if you hit
one.

================================

Greg Neff
VP Engineering
*Microsym* Computers Inc.
[email protected]
 
G

Greg Neff

I went to your web site.

What do you put in the tank ??

donald

In the military and transportation sectors, where the projects are
huge, we are what is known as a sub-subcontractor. The
subcontractors, who provide systems to the prime contractors, often
prefer to integrate and offer value-added services such as software
and logistics, as opposed to getting involved in too much original
design. So, we design and build circuit board assemblies for the
subcontractors to integrate into their systems. I think you can
understand that we are not at liberty to talk about much of this,
especially on the military side.

================================

Greg Neff
VP Engineering
*Microsym* Computers Inc.
[email protected]
 
R

RFrutos

After the PPC reads the HRCW, the start of execution is controlled by
the CIP bit. This defines the most significant 12 bits of the
exception handler address. These address bits can be all ones or all
zeroes, depending on the state of the CIP bit.

Now you have to look at the "Exceptions and Conditions" table in the
user's manual. You will see that the vector for system reset is
0x00100. So, depending on the state of CIP, the PPC will fetch its
first instruction at either 0x00000100 or 0xFFF00100. You shouldn't
do too much here because you don't have much space (256 bytes). What
you should do is jump to your hardware initialization routine.

You should insert at least rudimentary handlers for all of the
possible exceptions, so that you don't go out to left field if you hit
one.

================================

Greg Neff
VP Engineering
*Microsym* Computers Inc.
[email protected]

Thank you Greg,
so here I must to configure the OR0 and BR0 to address my EPROM and
then insert a jump to my boot code inside the EPROM or just jump
before configuring OR0 and BR0?
 
G

Greg Neff

Thank you Greg,
so here I must to configure the OR0 and BR0 to address my EPROM and
then insert a jump to my boot code inside the EPROM or just jump
before configuring OR0 and BR0?

After initial boot the only active chip select is 0, and it works in
the entire memory space (except the IMMR chunk as defined in the
HRCW). The initial timing is very lax, so it will work with any flash
or EPROM.

I know the User Manual is big, ugly and hard to navigate. Even so, I
suggest you spend plenty of time getting familiar with it. Use the
PDF version and search through the PDF to find stuff. It's much
faster than leafing through the book. Search for reset, boot, and so
on. For now, ignore the CPM and focus on the SIU and memory
controller.

This is not an 8051 with more bits. It is a very complex processor
with very complex resources. You don't write bytes to a UART, you
manage buffer descriptors and exchange com buffers in dual-port RAM.

People generally use an OS such as Linux, QNX, VXWorks, etc., since
the drivers are already provided. Bolting a board support package
onto an existing OS is plenty of work, let alone trying to do the
whole thing from scratch.

Don't get me wrong, I think it's great that you are working with this.
Just be warned that you have a huge learning curve ahead of you, and
people like me are not going spend dozens of hours teaching you
PowerQUICC architecture. You need to read the manual a few times, and
then start asking questions.

Go to the Freescale website and download as much introductory and
training information as you can find. Also look through the
application notes.


================================

Greg Neff
VP Engineering
*Microsym* Computers Inc.
[email protected]
 
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