Hi all,
considering a PLL synthesizer like here:
When you want a high frequency resolution, you choose R high. According to my notes taken during class, increasing R requires decreasing the bandwidth of the loop filter. I also noted this is because of "divider delay"...
It's a long time ago and I have really no idea where this comes from.
Could you give me some pointers?
thanks in advance,
Foxbox
considering a PLL synthesizer like here:
When you want a high frequency resolution, you choose R high. According to my notes taken during class, increasing R requires decreasing the bandwidth of the loop filter. I also noted this is because of "divider delay"...
It's a long time ago and I have really no idea where this comes from.
Could you give me some pointers?
thanks in advance,
Foxbox