S
Slav Mit.
HI, everyone. Can someone advise me (and the group) if there is a way to
avoid mistakes in schematic, which may appear if you write wrong off page
connector name or hierarchical pin/ports name? It is possible to create text
netlist, and ...comparing all the nets and schematic it is possible to find
mistakes, but it may take too much time. It is possible to create off page
connectors report and discover similar names in it. But may be there are
some additional features to do the same? So, what is the best way checking
up a schematic? Any hints?
avoid mistakes in schematic, which may appear if you write wrong off page
connector name or hierarchical pin/ports name? It is possible to create text
netlist, and ...comparing all the nets and schematic it is possible to find
mistakes, but it may take too much time. It is possible to create off page
connectors report and discover similar names in it. But may be there are
some additional features to do the same? So, what is the best way checking
up a schematic? Any hints?