need help from GC-eDRAMs experts

[vlsi_lady]

Hi, I'm desperate..please help me

1. how to measure the data retention time?

2. how to measure the smallest refresh-pulse-width possible?

(I'm using virtuoso if relevant..)

thanks!!

 

[(*steve*)]

1) increase the time until data starts getting corrupted.

2) decrease the time until data starts getting corrupted.

Note that testing for data corruption is non-trivial. You need to test worst case patterns where nearby 1 cells leak into a 0 cell and give versa. This requires intimate knowledge of the layout of the chip or lots of trial and error. In addition you need to find the most affected bit(s) as not all will be equally problematic.

If the device will be carried to high altitudes then you may need to take that into account as well.

Oh, temperature will affect things too.

Is it really worth it?

 

[Harald Kapp]

(I'm using virtuoso if relevant

What is virtuoso in this context? A web search turns up a lot of different things under the name virtuoso.

 

[(*steve*)]

I just assumed he was testing DRAM using a really good pianist.

 

[vlsi_lady]

What is virtuoso in this context? A web search turns up a lot of different things under the name virtuoso.

it's a design tool