NE555 reset pin using transistor

[tomcer34]

Hi, so I need my ne555 to oscillate only if signal is applied. I was thinking about using reset pin, but I had no luck. Is there work around? Or using trigger pin? I wanted to to it with tranzistor, but still no luck. Please help. Its for my digital ignition system. I can post full schematic if u need.

 

[Bluejets]

Pin 4 should work.
Show your circuit diagram including supply levels etc.

 

[crutschow]

Pin 4 has to be pulled below 0.5V for reset, which an NPN BJT or an N-Channel MOSFET can do.

What "tranzistor" did you try?
.

 

[tomcer34]

Pin 4 has to be pulled below 0.5V for reset, which an NPN BJT or an N-Channel MOSFET can do.

What "tranzistor" did you try?
.

I used BC549C. I also posted my schematic for circuit. Or any ideas how to stop spark until I apply signal? Signal starts at 0.6V low and high is 5V. Ne555 is oscillating between 7kHz~10kHz and interuput signal will be maximally 240Hz.

 

[crutschow]

Signal starts at 0.6V low and high is 5V

So you want the 555 to stop when the signal is low?

 

[tomcer34]

So you want the 555 to stop when the signal is low?

Basicly yes

 

[Bluejets]

Here is a pdf of an old circuit from way back when Adam was a boy.

I tend to use MJ10012 which is a darlington transistor designed for ignition coil switching.

 

[crutschow]

Below is the LTspice simulation of a 555 astable circuit with the output On (green trace) when the Enable input (yellow trace) is 5V and Off when the Enable input is 0.6V.

Note that the first 555 pulse is longer than the rest (typical when the 555 starts oscillating), and the last pulse can be truncated depending upon when the Enable signal goes low.

Does that do what you want?



If the increase in the first pulse-width and the truncated last pulse is a problem, then a JK flip-flop can be used to gate the signal and eliminate these variations (simulation below using a CD4027 JK-FF).
The 555 is now running continuously (at double the frequency due to the divide by two output from the flip-flop).
Since the gate signal and the 555 output are not synchronized, that does mean there will be a possible delay of up to one. 555 clock period before the pluses start and end.
I don't think that would be a problem in your system.

 

[tomcer34]

Below is the LTspice simulation of a 555 astable circuit with the output On (green trace) when the Enable input (yellow trace) is 5V and Off when the Enable input is 0.6V.

Note that the first 555 pulse is longer than the rest (typical when the 555 starts oscillating), and the last pulse can be truncated depending upon when the Enable signal goes low.

Does that do what you want?

View attachment 53481

Below is the LTspice simulation of a 555 astable circuit with the output On (green trace) when the Enable input (yellow trace) is 5V and Off when the Enable input is 0.6V.

Note that the first 555 pulse is longer than the rest (typical when the 555 starts oscillating), and the last pulse can be truncated depending upon when the Enable signal goes low.

Does that do what you want?

View attachment 53481

If the increase in the first pulse-width and the truncated last pulse is a problem, then a JK flip-flop can be used to gate the signal and eliminate these variations (simulation below using a CD4027 JK-FF).
The 555 is now running continuously (at double the frequency due to the divide by two output from the flip-flop).
Since the gate signal and the 555 output are not

Below is the LTspice simulation of a 555 astable circuit with the output On (green trace) when the Enable input (yellow trace) is 5V and Off when the Enable input is 0.6V.

Note that the first 555 pulse is longer than the rest (typical when the 555 starts oscillating), and the last pulse can be truncated depending upon when the Enable signal goes low.

Does that do what you want?

View attachment 53481

Below is the LTspice simulation of a 555 astable circuit with the output On (green trace) when the Enable input (yellow trace) is 5V and Off when the Enable input is 0.6V.

Note that the first 555 pulse is longer than the rest (typical when the 555 starts oscillating), and the last pulse can be truncated depending upon when the Enable signal goes low.

Does that do what you want?

View attachment 53481

I tried it and it doesn't work. My senzor output stays low. I tried different Rezistor configurations and still. I'm using 55100-3H-02-A hall effect. I had to use not gate, because it has sinking putput. This is my schematic for it. I had to use pull up Rezistor for senzor. Do u know, where problem may be? Tranzistors used are the same npn BC549C. Thank u for ur time

 

[tomcer34]

I tried it and it doesn't work. My senzor output stays low. I tried different Rezistor configurations and still. I'm using 55100-3H-02-A hall effect. I had to use not gate, because it has sinking putput. This is my schematic for it. I had to use pull up Rezistor for senzor. Do u know, where problem may be? Tranzistors used are the same npn BC549C. Thank u for ur time. Sorry but I used qouts wrong and its showing weird for my.

 

[bertus]

Hello,

Which values did you use for the pull-up resistors?
A resistor of 1 K @ 5 Volts should work:

Bertus

 

[crutschow]

I tried it and it doesn't work.

Without a complete schematic of what you have, I can not further help you.

 

[Bluejets]

This is my schematic for it.

Try facing North when you post your photos.
East is a real PIA.

 

[tomcer34]

Without a complete schematic of what you have, I can not further help you.

This it is. Sorry for my transformator, but I didnt had library for that. I cannot upload file with my schematic. It was made in Eagle

 

[tomcer34]

Hello,

Which values did you use for the pull-up resistors?
A resistor of 1 K @ 5 Volts should work:
Bertus

At first I used 20k , because i didnt want to overload it. But now im using 1k as u suggested. But problem is still there. Also when i dirrectly connect my hall efect to the reset pin of NE555 its working, but not as intended, because output stays high when hall effect is low. So idk

 

[tomcer34]

Try facing North when you post your photos.
East is a real PIA.

done

 

[tomcer34]

View attachment 53495

I made a mistake in my schematic. hall senzor used is still 55100-3H-02-A

 

[bertus]

Hello,

I would try this on the rest pin of the 555:

Bertus

 

[Alec_t]

When you want your 555 to stay 'off' (pin 3 low), is the sensor output high or low?

 

[tomcer34]

When you want your 555 to stay 'off' (pin 3 low), is the sensor output high or low?

sensor is high. It has sinking output. thats why im using not gate