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How? In stages, one gate at a time.
Give the green traces, names. Treat them as intermediate signals, outputs of one gate and inputs to other gates.
Somewhere in your book, or online you have the truth table for a NAND gate.
Each NAND gate has two inputs and a single output.
If you give the outputs of the NAND gates in the circuit, the green traces, labels, letters, names, as intermediate results, they must follow the truth table for the gates that drive them, for what goes before them.
In your circuit, the first green trace, top left, is the ouput of a single NAND gate with inputs of that gate D & E. Let's call the output "F"
So we draw a table with all possible states of D & E as rows of the first two columns. Label the columns "D" and "E". Make a column for the toutput, F. Since there are two inputs, there will be four binary combinations. So four rows. Then the new column for the first intermediate output "F" is just what a NAND gate does with thiose inputs, it comes straight from the NAND table in the book.
The columns you have now form the inputs for the NAND gate at the bottom, so we can give the next green line at the bottom a name, say "G" and give it a column in the table. Then using the inputs for this gate, which seem to be "E" & "F", we can fill in the column for "G".
If we keep doing this, we end up with a table with columns for inputs "D" & "E" and all intermediate green things we labeled and on to the final outputs.Q & Q'.
So the truth table you want, if you do not want to show working, is just the columns that show the actual inputs and actual outputs, D, E, Q & Q'.
Might be a good idea to show the whole table, to show how you got there.
Give the green traces, names. Treat them as intermediate signals, outputs of one gate and inputs to other gates.
Somewhere in your book, or online you have the truth table for a NAND gate.
Each NAND gate has two inputs and a single output.
If you give the outputs of the NAND gates in the circuit, the green traces, labels, letters, names, as intermediate results, they must follow the truth table for the gates that drive them, for what goes before them.
In your circuit, the first green trace, top left, is the ouput of a single NAND gate with inputs of that gate D & E. Let's call the output "F"
So we draw a table with all possible states of D & E as rows of the first two columns. Label the columns "D" and "E". Make a column for the toutput, F. Since there are two inputs, there will be four binary combinations. So four rows. Then the new column for the first intermediate output "F" is just what a NAND gate does with thiose inputs, it comes straight from the NAND table in the book.
The columns you have now form the inputs for the NAND gate at the bottom, so we can give the next green line at the bottom a name, say "G" and give it a column in the table. Then using the inputs for this gate, which seem to be "E" & "F", we can fill in the column for "G".
If we keep doing this, we end up with a table with columns for inputs "D" & "E" and all intermediate green things we labeled and on to the final outputs.Q & Q'.
So the truth table you want, if you do not want to show working, is just the columns that show the actual inputs and actual outputs, D, E, Q & Q'.
Might be a good idea to show the whole table, to show how you got there.
Very sorry. I fell into that one. I didn't even spot the significance of the green and the grey.
Sorry if I gave you along explanation of what you already knew.
Let me have a go at asking what I think is your real question, as in provide a little detail.
.
Give the circuit provided, the green traces, signals are determined by the inouts D & E, but the grey ones do not seem to be able to be determined. I can work out the truth tables of the green ones, from the inputs D & E, but how do I complete the truth table for the outputs Q & Q'?
.
A much more intersting question.
Let's set the inputs D & E to something. Tyhat is take one line of the truth table we have so far.
Let's assume perfect gates. No intermediate values, just ones and zeros.
If Q & Q' have states then they must work. Each has the the output of the other as an input.
So what options are there?
If we assumes, say Q' is a zero. Then work out the cnosequences of this as the missing input for Q, it will either come back to being Q' as zero, which says it is self-consistent, wehichis ok. Or it will say Q' is one, saying it is inconsistent. We can't have an inconsistent state, so that first guess can't be right.
So, we only have to work through each of the possible assumed states & see which are consistent.
We will get either. For each row of the table, only one consistent state, in which case we know where it sits.
Or we will get more than one state, which could exist,
or we will get no consistent states, in which case we can;t really draw conclusions except maybe hot gates fighting each other or oscillating as quickly as they can as the new outputs propagate round the cuircuit to the outputs & round again.
.
If you find that there are consistent states, you might want to just assume that one of them is active, set and then change the inputs to see what happens.
Whenever you get a an output fed back to an input like those last two gates, you get a chance of having a circuit that remembers, by just keeping its state from the last time it changed. Then some combinations of input will have no effect and some will change it.
Since your circuit has two inputs, your truth table gives you combinaitons of the green F & G inputs to the last gates. Maybe you can see that the last gates are sort of symmetrical.
So for each row of the truth table, that is for each of the four ways D & E can be, you get possibly a number of states that the last two gates can be in. Some combinations of D & E might force it into one way or another, others might just let it stay as it is.
.
Have a go, see where you get to,
Feel free to post where you get to for more comment if you like.
Others here may be able to explain more clearly.
Once you "see" how it works, you will find this is a very useful sort of a circuit.
Sorry if I gave you along explanation of what you already knew.
Let me have a go at asking what I think is your real question, as in provide a little detail.
.
Give the circuit provided, the green traces, signals are determined by the inouts D & E, but the grey ones do not seem to be able to be determined. I can work out the truth tables of the green ones, from the inputs D & E, but how do I complete the truth table for the outputs Q & Q'?
.
A much more intersting question.
Let's set the inputs D & E to something. Tyhat is take one line of the truth table we have so far.
Let's assume perfect gates. No intermediate values, just ones and zeros.
If Q & Q' have states then they must work. Each has the the output of the other as an input.
So what options are there?
If we assumes, say Q' is a zero. Then work out the cnosequences of this as the missing input for Q, it will either come back to being Q' as zero, which says it is self-consistent, wehichis ok. Or it will say Q' is one, saying it is inconsistent. We can't have an inconsistent state, so that first guess can't be right.
So, we only have to work through each of the possible assumed states & see which are consistent.
We will get either. For each row of the table, only one consistent state, in which case we know where it sits.
Or we will get more than one state, which could exist,
or we will get no consistent states, in which case we can;t really draw conclusions except maybe hot gates fighting each other or oscillating as quickly as they can as the new outputs propagate round the cuircuit to the outputs & round again.
.
If you find that there are consistent states, you might want to just assume that one of them is active, set and then change the inputs to see what happens.
Whenever you get a an output fed back to an input like those last two gates, you get a chance of having a circuit that remembers, by just keeping its state from the last time it changed. Then some combinations of input will have no effect and some will change it.
Since your circuit has two inputs, your truth table gives you combinaitons of the green F & G inputs to the last gates. Maybe you can see that the last gates are sort of symmetrical.
So for each row of the truth table, that is for each of the four ways D & E can be, you get possibly a number of states that the last two gates can be in. Some combinations of D & E might force it into one way or another, others might just let it stay as it is.
.
Have a go, see where you get to,
Feel free to post where you get to for more comment if you like.
Others here may be able to explain more clearly.
Once you "see" how it works, you will find this is a very useful sort of a circuit.
