Maker Pro
Maker Pro

LVS

hello,

I made the LVS Buffer stage but I don't manage to distinguish the
errors from the LVS/si.out folder.
layout
schematic

instances
un-matched 5 1
rewired
2 0

nets
un-matched 6
5
merged
0 1

terminals
un-matched 0 0
different type 0
0
total
0 9

and I didn't understand "rewired" and "un-matched"..

Thank you for your help.
 

Similar threads

Top