T
Tom Derham
Normally LVPECL receivers expect termination to be 50 Ohm to Vtt (which is
Vcc - 2V, or 1.3V for normal 3.3v lvpecl).
However, I have seen a couple of evaluation boards (one of which I rather
naively followed for one of my board designs) where both (differential)
outputs are terminated into 50 ohm to ground.
The signals are then used to drive the differential inputs to a DDS chip
(high impedance) requiring essentially lvpecl levels (centred on 1.6v dc
approx).
Can anyone suggest what the effect of this difference in termination will
have on the circuit?
Is it correct / acceptable design practice?
Many thanks
Tom Derham
Vcc - 2V, or 1.3V for normal 3.3v lvpecl).
However, I have seen a couple of evaluation boards (one of which I rather
naively followed for one of my board designs) where both (differential)
outputs are terminated into 50 ohm to ground.
The signals are then used to drive the differential inputs to a DDS chip
(high impedance) requiring essentially lvpecl levels (centred on 1.6v dc
approx).
Can anyone suggest what the effect of this difference in termination will
have on the circuit?
Is it correct / acceptable design practice?
Many thanks
Tom Derham