hello ,
i need help to understand how does each instruction fetch decode and execute in 8051 microcontroller
I made small project for LED blinking on proteus software
circuit
assembly code :
I don't understand how does following instruction fetch , decode and execute ?
I need information how does jump , branch , instruction fetch , decode and execute ?
I looked this link http://www.keil.com/support/man/docs/is51/is51_sjmp.htm
The SJMP instruction transfers execution to the specified address. The address is calculated by adding the signed relative offset in the second byte of the instructions to the address of the following instruction. The range of destination addresses is from 128 before thenext instruction to 127 bytes after the next instruction.
Operation
SJMP
PC = PC + 2
PC = PC + offset
I found this wikki page wikibooks.org/wiki/Microprocessor_Design/Program_Counter
there are diagram for jump and branch instruction. I don't understand why there are different multiplexer and ALU for jump and branch instructions. Please help me to understand that page on Program counter design.
how does PC increment or load with new address ? what is offset ?
i need help to understand how does each instruction fetch decode and execute in 8051 microcontroller
I made small project for LED blinking on proteus software
circuit
assembly code :
Code:
ORG 0
MainLoop:
setb P1.0 ; Turn LED ON
Acall Delay ; Wait a short time
clr P1.0 ; Turn LED OFF
Acall Delay ; Wait a short time
sjmp MainLoop ; Loop forever
Delay:
mov R1,#90 ; Set up outer loop count
mov R2,#225 ; Set up inner loop count
Delay1: djnz R2,Delay1 ; Inner loop
djnz R1,Delay1 ; Outer loop
ret
end
Code:
MainLoop:
Acall Delay
sjmp MainLoop
I looked this link http://www.keil.com/support/man/docs/is51/is51_sjmp.htm
The SJMP instruction transfers execution to the specified address. The address is calculated by adding the signed relative offset in the second byte of the instructions to the address of the following instruction. The range of destination addresses is from 128 before thenext instruction to 127 bytes after the next instruction.
Operation
SJMP
PC = PC + 2
PC = PC + offset
I found this wikki page wikibooks.org/wiki/Microprocessor_Design/Program_Counter
there are diagram for jump and branch instruction. I don't understand why there are different multiplexer and ALU for jump and branch instructions. Please help me to understand that page on Program counter design.
how does PC increment or load with new address ? what is offset ?
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