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Is it OK to to connect an external CMOS gate to a clock oscillator?

A

Andras Tantos

Hi!

I'm designing an FPGA board with an on-board PLL to generate the clock
signals. I've chosen the cy22383 from cypress mainly because of it's
availability from Digikey. However this part comes unprogrammed and all with
it's outputs disabled. Only the oscillator runs on power-on. I don't want to
spend ~250 USD on the programmer since it can be programmed through an I2C
bus. Of course that will not be a permanent configuration I'd have to
re-program it after every power-on, but that's OK.

However to do that I'll need a clock to generate the proper signals. I
thought I can connect a schmidtt trigger to the XTALOUT pin, and derive a
primary clock from there. On my prototype it works however I would like to
ask the more knowledgeable audience of this newsgroup if it's a reliable
solution or I was just lucky to get it working in my case. I guess the
additional capacitance of the CMOS input will tune the crystal a bit but
that's not a concern in my application.

Pll circuit (cy22393)
+-------------------+
| |
16MHz | |
+-------+XTALIN |
---+--- | |
+---+ | Other pins are |
| | | omitted for |
+---+ | simplicity |
---+--- | |
*-------+XTALOUT |
| | |
| | |
| +-------------------+
|
|
|
| 74AHC14
| schmidtt-trigger
| +-- Primary
| | -- clock out
+--------+ -O-------------------
| --
+--

Thanks,
Andras Tantos
 
R

Russell Powell

I don't see a problem with that. I also don't believe the CMOS
input cap will affect oscillator frequency. If you were trying to drive
directly from a crystal it would.
 
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