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This should be moved to the Microcontrollers and Programming section
A0...A10 from the CPU go to A0...A10 of the memory.
CS of the memory is decoded from A11...Axx (xx depending on the size of your address bus) such that CS becomes active (low) when the upper address bits are 2000h.
In modern mikroprocessors all this can usually done by programming the bus control logic (adddress decoder) appropriately. How that is done depends on the µC.
Regards,
Harald
A0...A10 from the CPU go to A0...A10 of the memory.
CS of the memory is decoded from A11...Axx (xx depending on the size of your address bus) such that CS becomes active (low) when the upper address bits are 2000h.
In modern mikroprocessors all this can usually done by programming the bus control logic (adddress decoder) appropriately. How that is done depends on the µC.
Regards,
Harald
Last edited:
Thanks "Harald[/QUOTE]" but using this condition there will be large no.of address formed
and its mentioned in the requirement that "other devices may be connected at other address" thats why i wrote a particular memory address is needed to be interfaced "i just wanted to know how to interface a memory device at a particular address" and if u can provide me a general ckt. diagram that would be helpful...
thanks
sumit
and its mentioned in the requirement that "other devices may be connected at other address" thats why i wrote a particular memory address is needed to be interfaced "i just wanted to know how to interface a memory device at a particular address" and if u can provide me a general ckt. diagram that would be helpful...
thanks
sumit
A memory chip will occupy a range of addresses as determined by the number of address pins it has.
You will need to set those address pins (either by connecting them to individual outputs of your uC, or by some other means of generating a bit pattern (e.g. a shift register).
Then you need to connect the data outputs of the memory chip to the uC via similar (but opposite) means
Some memory chips have other interfaces, often using two or three wires to transmit and receive serieal data. This is far more economical in pins, but requires more tricky programming.
If this isn't what you want to know, perhaps you can quote the uC and "memory device" you are planning to conect together?
You will need to set those address pins (either by connecting them to individual outputs of your uC, or by some other means of generating a bit pattern (e.g. a shift register).
Then you need to connect the data outputs of the memory chip to the uC via similar (but opposite) means
Some memory chips have other interfaces, often using two or three wires to transmit and receive serieal data. This is far more economical in pins, but requires more tricky programming.
If this isn't what you want to know, perhaps you can quote the uC and "memory device" you are planning to conect together?
If you decode the CS signal from A11..Axx then, done correctly, each CS will activate only one periheral chip or memory chip.
Using a 74HC138, for example, decoding Addresses A11, A12 and A13 will result in 8 consecutive 2k blocks starting at 2000h, then 4000h etc.
Details e.g. here: http://www.eee.metu.edu.tr/~cb/e447/Chapter 5 - v2.0.pdf
Harald
Using a 74HC138, for example, decoding Addresses A11, A12 and A13 will result in 8 consecutive 2k blocks starting at 2000h, then 4000h etc.
Details e.g. here: http://www.eee.metu.edu.tr/~cb/e447/Chapter 5 - v2.0.pdf
Harald
Last edited:
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