how to calculate TTL input impedance

[Matt Carpenter]

I'd like to understand the input impedance for the 74LS244 buffer.

TI's datasheet provides a schematic, but it looks to me that when the input
is high, the input transistor's base (which is attached to the input) isn't
conducting. The input transistor's emitter is attached to Vcc through a
9kohm resistor. I guess that's true for DC analysis? How about for AC
analysis?

On another part of the datasheet, Iih is listed as 20 uA when Vih = 2.7V.
So, from that am I to conclude that the input impedance is 135 kilohms (2.7V
/ 20uA)?

My goal is to understand the input imedance so that I can properly model a
bus for simulation and selection of the proper termination.

As always - thanks. Matt

 

[mike]

I'd like to understand the input impedance for the 74LS244 buffer.

TI's datasheet provides a schematic, but it looks to me that when the input
is high, the input transistor's base (which is attached to the input) isn't
conducting. The input transistor's emitter is attached to Vcc through a
9kohm resistor. I guess that's true for DC analysis? How about for AC
analysis?

On another part of the datasheet, Iih is listed as 20 uA when Vih = 2.7V.
So, from that am I to conclude that the input impedance is 135 kilohms (2.7V
/ 20uA)?

My goal is to understand the input imedance so that I can properly model a
bus for simulation and selection of the proper termination.

As always - thanks. Matt

What are you driving it with?
That's what needs terminating.
The input is nonlinear. As is the thing you're driving it with...probably.
A perfect termination will reduce reflections. That's good.
But all the energy that goes into the termination does not
go into the input. This may or may not impact the logic function.
For most logic applications, the input C is about all that
really matters. Stated another way, if other than the input C
does matter, you're not using it as a (repeatable) logic function.
mike

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[Roy McCammon]

I'd like to understand the input impedance for the 74LS244 buffer.

TI's datasheet provides a schematic, but it looks to me that when the input
is high, the input transistor's base (which is attached to the input) isn't
conducting. The input transistor's emitter is attached to Vcc through a
9kohm resistor. I guess that's true for DC analysis? How about for AC
analysis?

On another part of the datasheet, Iih is listed as 20 uA when Vih = 2.7V.
So, from that am I to conclude that the input impedance is 135 kilohms (2.7V
/ 20uA)?

My goal is to understand the input imedance so that I can properly model a
bus for simulation and selection of the proper termination.

As always - thanks. Matt

The I-V curve for a TTL input is rather non-linear. I'd go
so far as to say that there is no proper impedance for large
slow signals. But for fast signals, you can probably
model it as a capacitance. I haven't looked at a TTL
data sheet for a long time, but usually somewhere they
show a "standard load" for making timing measurements.
That is probably what you need. In the old days you usually
found it at the front of the data book in an app note section.
These days you can probably find it at the web site of the TTL manufacturer.

 

[Rene Tschaggelar]

I'd like to understand the input impedance for the 74LS244 buffer.

TI's datasheet provides a schematic, but it looks to me that when the input
is high, the input transistor's base (which is attached to the input) isn't
conducting. The input transistor's emitter is attached to Vcc through a
9kohm resistor. I guess that's true for DC analysis? How about for AC
analysis?

On another part of the datasheet, Iih is listed as 20 uA when Vih = 2.7V.
So, from that am I to conclude that the input impedance is 135 kilohms (2.7V
/ 20uA)?

My goal is to understand the input imedance so that I can properly model a
bus for simulation and selection of the proper termination.

That is one of the problems of TTL, there is no impedance defined.
The output can be regarded as open collector with a pullup.
In case of a high level on the output, there is a weak internal pull up.
In case of a low level on the output, the output transistor just sinks
whatever there is attached.
Meaning you'll never get a fast bus with TTL.

Rene

 

[James Meyer]

My goal is to understand the input imedance so that I can properly model a
bus for simulation and selection of the proper termination.

As always - thanks. Matt

You've started at the wrong end of the problem.

First, you stated that you found out the hard way that you needed
termination networks on your bus lines. You didn't say (or I didn't see you
say) exactly how you came to this conclusion. You may not need termination at
all.

Second, an ISA bus usually runs at 10MHz. At that frequency, it would
take a physically very long bus structure to begin to accumulate enough
capacitive and inductive parasitic characeristics to influence the signals on
the bus to a degree that would indicate that termination would make the
difference between the bus working or not.

Third, if you do indeed need termination then you don't start with the
driven devices. The drivers in almost any bus system will have an output
impedance very much lower than any load connected to the bus. You start with
the drivers and the bus characteristics first. Then you consider the driven
devices.

Tell us why you think you need termination and then we can tell you the
type of termination you should design and how to do it.

Jim

 

[Jim Thompson]

I'd like to understand the input impedance for the 74LS244 buffer.

TI's datasheet provides a schematic, but it looks to me that when the input
is high, the input transistor's base (which is attached to the input) isn't
conducting. The input transistor's emitter is attached to Vcc through a
9kohm resistor. I guess that's true for DC analysis? How about for AC
analysis?

On another part of the datasheet, Iih is listed as 20 uA when Vih = 2.7V.
So, from that am I to conclude that the input impedance is 135 kilohms (2.7V
/ 20uA)?

My goal is to understand the input imedance so that I can properly model a
bus for simulation and selection of the proper termination.

As always - thanks. Matt

It's non-linear. Analyze it from a DC sweep point of view and you'll
see what I mean.

...Jim Thompson

 

[Matt Carpenter]

Tell us why you think you need termination and then we can tell you the

type of termination you should design and how to do it.

All of these posts have been very helpful dialog. It looks like this one is
the best to
continue the thread.

You've started at the wrong end of the problem.

First, you stated that you found out the hard way that you needed
termination networks on your bus lines. You didn't say (or I didn't see you
say) exactly how you came to this conclusion. You may not need termination at
all.

I built a passive ISA bus backplane, without termination, for a PCjr (ok,
ok,
please keep reading!) So, it's at 4.77 MHz. There's a nice long and evil
ribbon
cable that connects the machine to the 3 slot backplane. The cable is 17.5"
and the board is about 3".

When I plugged in a known working card and found that it didn't work, I put
it
on the scope and saw a total mess. I think there's a ton of crosstalk on
the ribbon
cable.

So, I've been getting an education in signal integrity. Before I solve the
cable
problem (by reducing length and using flat twisted pairs), I want to make
sure that
I don't have a ton of reflections as well.

Using the 3M cable specs, I calculate my cable as having 19pF of capacitance
and
219 nH of inductance. Using stripline equations I approximate the backplane
PCB
as adding 24 nH and 6.5 pF.

The bus drivers are LS244/5s, a LS125, LS373, and LS257.

Using a 5 MHz function generator and a scope, I played with an AC
termination (36pF, and a pot) on one of the wires and adjusted the pot until
I got
as good of a square as I could get.

However, when I hooked it up to the PCjr, the waveform looked awful. Now
that I'm writing this, I was probably seeing massive crosstalk. (?)

At this point, my preference is to use Schottky diode clamping to try and
keep
the signals as clean as possible. I think diode termination is the best
mostly due to
its low power consumption, the fact that I won't have to match impedances,
and
that it will still work as the bus load changes when ISA boards are plugged
into
the bus.

Anyway, I'd like to use SPICE to simulate these termination techniques
before I
prototype.

The bus drivers in the PCjr drive a couple 74LS chips before the signal runs
out the side into my cable+backplane. Therefore, I want to make sure these
are
properly represented in my model.

Using the 74LS244 datasheet, I can see that the output stage is a totem pole
output, tied to Vcc througha 50 ohm resistor. In my model, I'm using a 50
ohm
series resistor to represent the output impedance of the LS244 driver. I
probably
need to add a 3.5 pF capacitor to the model to represent the output
capacitance
of the driver. I obtained this value from a TI App Note (Designing with
Logic)
that quoted this value as a representative value for the 74LS family.

So, that's where I'm at!

 

[James Meyer]

I built a passive ISA bus backplane, without termination, for a PCjr (ok,
ok,
please keep reading!) So, it's at 4.77 MHz. There's a nice long and evil
ribbon
cable that connects the machine to the 3 slot backplane. The cable is 17.5"
and the board is about 3".

When I plugged in a known working card and found that it didn't work, I put
it
on the scope and saw a total mess. I think there's a ton of crosstalk on
the ribbon
cable.

First, I can't think of a device that can lie to you quite as
effectively as a scope can when it's connected to a circuit in the wrong place.
I'm not talking about where the tip of the probe is connected, but where the
ground lead is clipped. Take my word for it. The only signal that matters is
the signal that the chip sees. And that can be quite different than the signal
that the scope sees. Believe none of what you hear and only half of what you
see.

I agree that there is probably a lot of crosstalk due to that foot and a
half of cable. The first thing to do is to replace the cable with one with
enough more conductors in it so that you can wire a ground in between each and
every active signal. Signal-ground-signal-ground-signal-ground and etc. At the
PC end of the cable, connect the grounds to the largest ground trace you can
find that's close to the driver ICs. Don't scatter the ground connections
around. Keep them close together. Treat the card socket end of the cable the
same way.

Using the 74LS244 datasheet, I can see that the output stage is a totem pole
output, tied to Vcc througha 50 ohm resistor. In my model, I'm using a 50
ohm
series resistor to represent the output impedance of the LS244 driver.

I don't think that 50 ohm resistor is actually in the circuit of the PC.
It may be in the datasheet, but only to illustrate something they were trying
get across.

Take a cue from Paul Burridge and forget trying to model something that
may or (more likely) may not resemble the "real world".

I've got a book here somewhere that I can't find right now with a title
"Interfacing to the IBM PC". It's a wonderfully practical book with a whole
chapter about adding extra card slots on the end of a cable just like you're
trying to do. It's somewhat old and may be hard to find but you really should
try to find a copy. I'll keep looking so I can give you the publisher and
library catalog number to make it easer for you to find.

In the meantime, cut up some more cable. The cable doesn't have to be
wide enough for all the signals and grounds in one piece, but do alternate each
signal with a ground.

Jim

 

[Matt Carpenter]

First, I can't think of a device that can lie to you quite as

effectively as a scope can when it's connected to a circuit in the wrong place.
I'm not talking about where the tip of the probe is connected, but where the
ground lead is clipped. Take my word for it. The only signal that matters is
the signal that the chip sees. And that can be quite different than the signal
that the scope sees. Believe none of what you hear and only half of what you
see.

This is reassuring. Although I'm sure I grounded the probe to a ground on
the bus.

You know, what I didn't do, was hook a three wire cable into the port, with
only
one wire connected (to say, the clock) to isolate and view the signal
without
crosstalk. Might be something to try if I have some time.

I agree that there is probably a lot of crosstalk due to that foot and a
half of cable. The first thing to do is to replace the cable with one with
enough more conductors in it so that you can wire a ground in between each and
every active signal. Signal-ground-signal-ground-signal-ground and etc. At the
PC end of the cable, connect the grounds to the largest ground trace you can
find that's close to the driver ICs. Don't scatter the ground connections
around. Keep them close together. Treat the card socket end of the cable the
same way.

This must be good advice, it's the second recommendation I've gotten!

I don't think that 50 ohm resistor is actually in the circuit of the PC.
It may be in the datasheet, but only to illustrate something they were trying
get across.

You're right. Rather in the LS244 output stage schematic, the output
transistor
totem pole has the upper transistor's collector tied to a 50 ohm resistor
which
then goes to Vcc all within the chip.

I've got a book here somewhere that I can't find right now with a title
"Interfacing to the IBM PC". It's a wonderfully practical book with a whole
chapter about adding extra card slots on the end of a cable just like you're
trying to do. It's somewhat old and may be hard to find but you really

should

Excellent! In fact, I bought that book a month ago based on another's
recommendation. It is a great book! (Sams, by Lewis Eggebrecht)

It actually recommends the following: for unidirectional signals, repower
them
with an LS240 driver and receiver. For bi-directional signals (only the
data bus)
use AC termination: a 43pF capacitor tied to +5V with a 220 ohm resistor.

He says the primary purpose of the drivers are to shunt the cable
capacitance
so that it's not reflected on to the system bus.

It also recommends a twisted pair cable with a ground provided for each
signal.

He says this is suitable for up to a 3 foot cable with four slots. (Hey,
I'm only at
three slots with a 17.5" cable!).

So, there is some termination recommended. Unfortunately, it will be
difficult
for me to rework the design to include the drivers and receivers, so, I'm
simply
trying to make the lines quiet enough with termination to work.

Regards, Matt

 

[Tim Shoppa]

I'd like to understand the input impedance for the 74LS244 buffer.

TI's datasheet provides a schematic, but it looks to me that when the input
is high, the input transistor's base (which is attached to the input) isn't
conducting. The input transistor's emitter is attached to Vcc through a
9kohm resistor. I guess that's true for DC analysis? How about for AC
analysis?

On another part of the datasheet, Iih is listed as 20 uA when Vih = 2.7V.
So, from that am I to conclude that the input impedance is 135 kilohms (2.7V
/ 20uA)?

My goal is to understand the input imedance so that I can properly model a
bus for simulation and selection of the proper termination.

You won't find a single number, by the fundamental design of TTL.

It takes very little current to hold a TTL input high, and it takes a
lot of current to pull it low. But even in the low direction, the
current as a function of applied voltage is quite nonlinear.

As a result, for any bus design you need to consider at least two
different conditions, high and low, and then there are the tristate
leakages of tristate outputs that aren't active. Most 80's vintage
TTL handbooks discuss this in some detail.

If you need a fixed number, use a high-impedance TTL input and "swamp"
it with a smaller resistor in parallel.

Tim.

 

[Fred Bloggs]

So, that's where I'm at!

Save yourself some time and terminate the far end of your backplane with
a 220/330 resistor divider between 5V and GND- available as standard
resistor networks in SIP/DIP form- there is a reason for this. That
would be 20-mil traces on 50 mil centers over solid GND plane.
Interleaved GNDs on the ribbon cable- twisted pair nice but not
necessary- the TTL input loading is swamped by the much lower trace
controlled impedance and is not critical for four crumby slots.

 

[James Meyer]

place.

This is reassuring. Although I'm sure I grounded the probe to a ground on
the bus.

"A ground" won't do. If you're concerned with the signal that an IC
sees at its input, then you have to look directly at that point the same way the
IC is looking at it. And that includes making the "ground" connection directly
to the ground pin of the IC as well as putting the probe tip at the IC's input
pin.

It's unfortunate that it's not as simple as that though. The scope's
ground lead is connected to the scope's chassis, and that is connected to the
scope's AC line cord ground, and that is connected through the house wiring to
the PC's chassis through it's AC line cord's ground connection, and that is
connected back to the ground of the power supply which finally goes back to the
ground pin of the driver IC that is supplying the signal that you're "measuring"
back at the far end of the cable.

Once you connect the scope's ground lead, you've changed the
characteristics of the cable system so that whatever was present before the
scope attachment is changed and you're measuring something else entirely.

This must be good advice, it's the second recommendation I've gotten!

That's because it may not solve all the problems but it's the best way
to prevent a lot of them.

Excellent! In fact, I bought that book a month ago based on another's
recommendation. It is a great book! (Sams, by Lewis Eggebrecht)

That's the one!

Jim

 

[John Woodgate]

I read in sci.electronics.design that James Meyer <[email protected]>

Once you connect the scope's ground lead, you've changed the
characteristics of the cable system so that whatever was present before
the scope attachment is changed and you're measuring something else
entirely.

What you can do is to look at the result with the scope ground lead
connected to the ground **at the IC in question**, and then with 10 ohms
in series with the ground lead and then with 100 ohms in series. If you
see differences, the ground loop through the building wiring is indeed
causing a problem. But often the results with 10 ohms and 100 ohms are
very similar, showing that you have eliminated the ground loop's effects
with the added resistance.

 

[James Meyer]

I read in sci.electronics.design that James Meyer <[email protected]>


What you can do is to look at the result with the scope ground lead
connected to the ground **at the IC in question**, and then with 10 ohms
in series with the ground lead and then with 100 ohms in series. If you
see differences, the ground loop through the building wiring is indeed
causing a problem. But often the results with 10 ohms and 100 ohms are
very similar, showing that you have eliminated the ground loop's effects
with the added resistance.

Good trick. I'll add that to my bag of them. Of course, I'll claim
that I invented it.

Jim

 

[Michael A. Terrell]

First, I can't think of a device that can lie to you quite as
effectively as a scope can when it's connected to a circuit in the wrong place.
I'm not talking about where the tip of the probe is connected, but where the
ground lead is clipped. Take my word for it. The only signal that matters is
the signal that the chip sees. And that can be quite different than the signal
that the scope sees. Believe none of what you hear and only half of what you
see.

Jim

The scope isn't lying, its giving you a display of what you feed it.
It isn't the scopes fault if you feed it garbage, and expect clean
displays.