How many mA are required for a LOW and HIGH signal on a digital CMOS gate.

[Mr. J D]

I am looking at the datasheet for a digital XOR gate,
http://www.fairchildsemi.com/ds/NC/NC7SZ86.pdf . How many mA must be
applied to signal pins to make a LOW or HIGH signal?

 

[Phil Allison]

** Groper alert !!

I am looking at the datasheet for a digital XOR gate,

** But not seeing the bleeding obvious.

http://www.fairchildsemi.com/ds/NC/NC7SZ86.pdf . How many mA must be
applied to signal pins to make a LOW or HIGH signal?

** Mosfets require no DC current at the gate.

Page 3 of the pdf data says:

Input leakage current: +/- 1uA max. at 5.5 volts and 25C.




........ Phil

 

[Chris]

I am looking at the datasheet for a digital XOR gate,
http://www.fairchildsemi.com/ds/NC/NC7SZ86.pdf . How many mA must be
applied to signal pins to make a LOW or HIGH signal?

Hi, Mr.JD. The data sheet tells you.

On the bottom of p.3, it says that input leakage current is +/-1uA max
at 25C, and +/-10uA over the temp range. It also says on the top of
p.4 that input capacitance is 4pF typical.

You should note that a typical input, like all CMOS logic inputs, has
an input current of nearly zero uA.

CMOS inputs in general don't have any DC input current -- you look at
them as small (pF level) capacitive loads. That can cause problems
with transition times, which can be an issue under some circumstances.

Good luck
Chris

 

[Ben Jackson]

I am looking at the datasheet for a digital XOR gate,
http://www.fairchildsemi.com/ds/NC/NC7SZ86.pdf . How many mA must be
applied to signal pins to make a LOW or HIGH signal?

Almost none. All you really have to consider is the desired rise time
vs input capacitance (4p) and the leakage current (10uA in that datasheet).
The input rise/fall time would dominate if you wanted to run the device
really fast, but even then something <1mA is probably plenty.

 

[Mr. J D]

** Groper alert !!




** But not seeing the bleeding obvious.




** Mosfets require no DC current at the gate.

Page 3 of the pdf data says:

Input leakage current: +/- 1uA max. at 5.5 volts and 25C.




....... Phil

Thanks for the insults, LOL. I knew that CMOS, because they are mosfet
driven, and not transistor driven, that they did not need a current.
However, you misread what I asked. What meant was does the CMOS see a
0V 0uA at the gate as a LOW signal?

 

[colin]

I am looking at the datasheet for a digital XOR gate,
http://www.fairchildsemi.com/ds/NC/NC7SZ86.pdf . How many mA must be
applied to signal pins to make a LOW or HIGH signal?

not very much just leakage current, 0 to 0.01 ma

Colin =^.^=

 

[John Popelish]

I am looking at the datasheet for a digital XOR gate,
http://www.fairchildsemi.com/ds/NC/NC7SZ86.pdf . How many mA must be
applied to signal pins to make a LOW or HIGH signal?

You have to provide up to 10 uA of input leakage current plus whatever
is needed to charge the input capacitance of 4 pF as fast as the want
the input to change states. I=C*(dv/dt), where dv is the logic swing
(actually the swing needed to get from the minimum low state input
voltage to the maximum high state input voltage, or vice versa) and dt
is the rise or fall time you require.

 

[Phil Allison]

** Groper alert !!!!!!!!

Thanks for the insults, LOL. I knew that CMOS, because they are mosfet
driven, and not transistor driven, that they did not need a current.

** Then why the **** ask about one ???

However, you misread what I asked.

** No I did not !!

What meant was does the CMOS see a
0V 0uA at the gate as a LOW signal?

** Which is NOTHING like your original question.

" How many mA must be applied to signal pins to make a LOW or HIGH signal? "


The data sheet has the answer to both.





......... Phil

 

[mc]

I am looking at the datasheet for a digital XOR gate,
http://www.fairchildsemi.com/ds/NC/NC7SZ86.pdf . How many mA must be
applied to signal pins to make a LOW or HIGH signal?

If it's CMOS, essentially none (something like 1/1,000,000,000,000 amp).
You have to charge or discharge the gate capacitance, which is a few tens of
pF (I think). Then no more electrons flow.

 

[mc]

Thanks for the insults, LOL. I knew that CMOS, because they are mosfet
driven, and not transistor driven, that they did not need a current.
However, you misread what I asked. What meant was does the CMOS see a
0V 0uA at the gate as a LOW signal?

Not reliably because there could be some leakage. There should always be a
path to ground, even if it is through many megohms, if you want the input to
see "low" reliably.

 

[Robert Baer]

I am looking at the datasheet for a digital XOR gate,
http://www.fairchildsemi.com/ds/NC/NC7SZ86.pdf . How many mA must be
applied to signal pins to make a LOW or HIGH signal?

You do *not* "apply" current; inputs are from *voltage* sources.

 

[Robert Baer]

** Groper alert !!






** But not seeing the bleeding obvious.






** Mosfets require no DC current at the gate.

Page 3 of the pdf data says:

Input leakage current: +/- 1uA max. at 5.5 volts and 25C.




....... Phil

...and only because it is easy and *fast* to test for 1uA; typical is
in the low nanoamp region.

 

[Robert Baer]

Thanks for the insults, LOL. I knew that CMOS, because they are mosfet
driven, and not transistor driven, that they did not need a current.
However, you misread what I asked. What meant was does the CMOS see a
0V 0uA at the gate as a LOW signal?

You did *not* ask or say that originally.

 

[Eeyore]

Thanks for the insults, LOL. I knew that CMOS, because they are mosfet
driven, and not transistor driven, that they did not need a current.
However, you misread what I asked. What meant was does the CMOS see a
0V 0uA at the gate as a LOW signal?

It cares only about voltage.

0V = LOW

Graham

 

[John Fields]

It cares only about voltage.

---
That's not true. On edge triggered devices, the rise and fall times
of the inputs are required to be fast enough going from one input
state to the other to drive the outputs to their terminal states in
the time specified by the data sheet.

Since the gate capacitance of the inputs is what's being driven,
then, it also cares about current and, therefore, the impedance of
the driver.

 

[Mr. J D]

You do *not* "apply" current; inputs are from *voltage* sources.

Thanks Mr. Captain Obvious.

 

[Don Bowey]

Thanks Mr. Captain Obvious.

If it was so obvious, why did you post the original question.

You come across as either a not-too-bright troll, or someone short of
understanding, but hates to be told anything.