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High Side switching N mosfet

Just finished going through a series of 6 videos on you tube from Julian Ilett in relation to using both P and N type mosfets in high side switching.
Thought they may be of interest to some as it was to me.
Starts here.........

 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
The capacitor is charged when the mosfet is off.

When you turn the mosfet on, the capacitor will start to slowly discharge, eventually it will discharge enough that the mosfet will begin to turn off.

The final state is that the mosfet will have a Vds equal to the Vgs required to carry Id plus a little bit cause by the Vf of the diode at the leakage current of the capacitor and the gate and the other opto (and leakage on the board, etc).

It sounds like you're applying a PWM signal to the gate, so the on time is likely to be far less than the time required to significantly discharge the cap.

It might be worth while adding a bit of resistance in series with the diode to limit the maximum charge current. I'd pick a value that limits it to the single pulse maximum for the diode. So at 12V and with a 1N914, a resistance of 10Ω would be fine.
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
There are leakage paths everywhere. It's not a question of IF, but of WHEN.

As long as the MOSFET is regularly switched off, you won't have a problem.
 
He is correct in that it is an insulated gate inhancment mode FET. The leakages are usually attributed to using an electrolytic capacitor or junction leakage through the diode. If you are losing anything through the FET then it is damaged. I have found it best if you are running at a really low frequency use a tantalum capacitor otherwise if you are running at normal switching power supply speeds of 20 Khz or so a 100nf Poly styrene capacitor will be quite sufficient.
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
If you are losing anything through the FET then it is damaged.

As a person with equipment capable of measuring that leakage, I'd have to say you're wrong on that point.

However, that's probably not the main source of leakage. There's also leakage across the board, which may be affected by residual flux, humidity, and the type of the board. If your off time is very short, the capacitor will be depleted cycle by cycle, so a minimum off time is typically required.

There are a number of devices which use this method, sometimes with voltage sensing across the capacitor which will turn off the mosfet periodically to allow the voltage across the capacitor to rise to a safe value again.

See here (especially paragraph 8.3.2.1 on page 11)
 
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