FWIW I designed a little sawtooth oscillator for this job, mostly as a way to test the simulation features of circuitlab.com (which are very very slow). It seems to work per the simulation but I haven't built it up myself to check.
The ramp is not truly linear because C2 is charged through a resistance (R6) not a current source. R6 could be replaced by a current source to achieve a linear ramp, if this is important, but I suspect a curved ramp will be acceptable for this application.
C1 should be very roughly 1/1000th of C2.
R6 and C2 determine the ramp time.
Q4 is emitter follower with high current gain. The output terminal follows the voltage on C2 with a positive voltage offset of about 1.3V, so the bottom of the ramp will be around 1.3V. A voltage divider can be used to reduce this to exactly 1V if necessary. The circuit as shown with R7 at 1K has a fairly low output impedance and can drive a voltage divider with a total resistance as low as 5K (assuming the top of the ramp voltage doesn't need to go over 5V).
Initially C2 is discharged so the output will be around 1.3V. Assume R7 is fully clockwise; the wiper voltage provides enough bias (via R5) to turn on Q1, which turns on Q2, removing the bias from Q3 and allowing C2 to charge via R6.
In this state, Q1 base-emitter voltage is about 0.7V and Q2 collector is close to 0V. As C2 charges, the voltage at OUT rises, and the R7 wiper voltage rises, until there is no longer sufficient bias to keep Q1 turned on. When Q1 turns off enough that Q2 starts to lose base bias, Q2 turns off as well, and its collector voltage starts to increase towards 0.7V (limited by the base-emitter voltage of Q3, whose emitter is grounded). C1 couples this increasing voltage onto Q1 base and this accelerates the change to the OFF state (Q1 and Q2 both OFF).
This action also turns on Q3 which discharges C2 rapidly. As the voltage on C2 drops, the voltage at OUT drops quickly as well, and the voltage across R7 increases rapidly to the point where it would be enough to forward-bias Q1, but because of the extra 0.7V rise coupled into Q1 base by C1, Q1 remains OFF, and so does Q2. This delay (caused by the time constant of C1 and R5) ensures that Q3 remains ON long enough to completely discharge C2.
After a time determined by R5 and C1, the increased voltage across R7 (lowered voltage on R7 wiper) causes Q1 base to fall to a voltage where Q1 begins to conduct. When Q2 has sufficient bias, it will conduct also, which couples a negative-going transient through C1 which reinforces the switch into the ON state for Q1 and Q2. Q3 is now OFF, and C2 again charges up through R6 and the process repeats.
R3 ensures that when Q2 collector falls rapidly towards 0V there is no high-current pulse through Q2 collector, C1, and the Q1 base-emitter junction.
This circuit will be somewhat sensitive to power supply voltage variations and should be powered from a regulated supply. If the supply voltage is changed much from 6V, changes in the R7 area may be needed. Immunity to supply voltage variations could be improved by returning C2 to the positive supply but then a current limiting resistor in the Q3 collector path would be needed. To minimise the component count I have left it with C2 returned to the 0V rail.
If R7 is set too close to the counter-clockwise end, the circuit will not oscillate and the output will sit at the minimum voltage. R6 must not be set very close to its minimum resistance because this could cause excessive current through Q3 which could damage it. If this is an issue, add a 10K "stopper" resistor in series with R6.
The ramp will always start at about 1.3V but the top end voltage is set via R7. Adjust R7 for the desired output voltage swing before adjusting R6 for the desired ramp period. You may want to reduced C2 if you find R6 is close to its minimum resistance end.
