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Help me understand this combination lock circuit (4017)
- Thread starter Appy1
- Start date
davenn
Moderator
I got it from a website a while ago, but lost the URL. As far as I remember there were no explanations or instructions.
Actually, somehow, just looking at it for a few minutes now gave me an idea. The push buttons activate the clock until output 6, which connects to an nor gate (IC2c). IC2d then triggers the base of the transistor (Q2) allowing current to pass through it and the relay, which activates the solenoid...
I assume the reset function of the IC is somehow used when an incorrect combination is used. I know that when I mistakenly pressed on the wrong PB I'd have to wait a moment then re enter the sequence from the beginning.
Not sure if I'm right about any of this but maybe I'm starting to piece things together.
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At switch on the 0 output of the 4017 is logic 1 (due to the reset delivered by C1, IC2a and IC2b).
Only by pressing the correct button will that logic level be passed around to the clock input of the 4017, incrementing the output and causing a 1 at output 1, 1 at output 2 etc. The clock pulse also switches Q1 to keep C1 discharged and prevent a reset occurring.
If you fail to press the next button in time the circuit is reset as C1 reaches a level high enough to initialise a reset pulse level, similarly it is reset if you press the wrong button. Only by pressing the correct buttons in the correct sequence do you get to increment the outputs of the 4017 along to the last output (6) where it operates the solenoid (momentarily) by triggering the monostable built around IC2c and IC2d.
Only by pressing the correct button will that logic level be passed around to the clock input of the 4017, incrementing the output and causing a 1 at output 1, 1 at output 2 etc. The clock pulse also switches Q1 to keep C1 discharged and prevent a reset occurring.
If you fail to press the next button in time the circuit is reset as C1 reaches a level high enough to initialise a reset pulse level, similarly it is reset if you press the wrong button. Only by pressing the correct buttons in the correct sequence do you get to increment the outputs of the 4017 along to the last output (6) where it operates the solenoid (momentarily) by triggering the monostable built around IC2c and IC2d.
Thank you! That was very helpful.
Sir Appy1 . . . . .
It's a MIRACLE !
Back at your initial query time . . . I had prepped an explanatory illustration for your question.
Thereby, being ready to post it the next morn . . . . then . . . I coundn't find that PNG anywhere . . .was it trashed ?
Just now FOUND it, stored in another FOLDER, it not being so frequently used.
In the interim I see that Sir Kelly used his Eye and lightly touched opon the circuits nitty aspect . . . .now here is the
FULL gritty aspect and that is being HEAV-EE on the GRITTY . . . . . going into some real depth.
TECHNO REFERENCING:
Consult the very bottom pic initially . . . .
Then you take note of the 4017's counter reset circuit at the bottom left corner and its R1-C1 timeout elements, which acts with either the very initial 6 VDC on the powering up of the system or else, inactivity of the system, and R1-C1's shifting charge state will also initiate a reset.
Then look at the sequential steps of the entry code that have to be PRECISELY executed.
# 1 Picture . . . . . has the counter at its first state, with the now [ 0 ] being the ONLY logic HIGH that is active.
Then there are the D1-D6 steering diodes that are ONE-WAY paths for your logic voltages. The RED line path will be the only valid path for
your first combinations entry. If you press any of the 2 other switches, you will not have applied the proper logic to the input of the counter.
That gets your counter timing sequence off and you are then . . . . . . . . . . ahem . . . . . . . . . . . . . .copulated.
Now should you have chosen Door Number # 1 your RED [ 0 ] high logic can then pass thru D1 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 1 ] high logic . (The common buss sharing with D3 has no effect due to its polarity. )
# 2 Picture . . . . . has the counter at its second state, with the now RED [ 1 ] being the ONLY logic HIGH that is active. It can pass thru D2 and end up at
SW2 as being the valid switch. Since the shared buss companions of D4 and D6 are polarized so as to be non conductive, they are ignored.
The now proper press of SW2 advances the count so that RED [ 1 ] high logic can pass thru D2 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 2 ] high logic .
# 3 Picture . . . . . has the counter at its third state with the now RED [ 2 ] being the ONLY logic HIGH that is active. It can pass thru D3 and end up at
SW1 as being the valid switch. Since the shared buss companion of D1 is polarized so as to be non conductive, it is ignored. (See why they are called
" steering " diodes now ? )
The now proper press of SW1 advances the count so that RED [ 2 ] high logic can pass thru D3 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 3 ] high logic .
# 4 Picture . . . . . has the counter at its fourth state with the now RED [ 3 ] being the ONLY logic HIGH that is active. It can pass thru D4 and end up at
SW2 as being the valid switch. Since the shared buss companion of D2 and D6 are polarized so as to be non conductive, they are ignored.
The now proper press of SW2 advances the count so that RED [ 3 ] high logic can pass thru D4 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 4 ] high logic .
# 5 Picture . . . . . has the counter at its fifth state with the now RED [ 4 ] being the ONLY logic HIGH that is active. It can pass thru D5 and end up at
SW3 as being the valid switch.
The now proper press of SW3 advances the count so that RED [ 4 ] high logic can pass thru D5 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 5 ] high logic .
# 6 Picture . . . . . has the counter at its sixth state with the now RED [5] being the ONLY logic HIGH that is active. It can pass thru D6 and end up at
SW2 as being the valid switch. ( Buss companion diodes D2 and D4 are ignored.)
The now proper press of SW2 advances the count so that RED [5] high logic can pass thru D6 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 6 ] high logic .
BOTTOM PICTURE . . . . .
This point is where the last counter advance created a RED [ 6 ] high logic and that steady state HIGH logic travels down and enters one input of IC2c logic gate , that gates activation, along with its companion IC2d on the end . . . . (all shown within the YELLOW AREA) . . . . will create a TIMED logic HIGH at the output of the IC2d section.
That supplied voltage passes thru R5 and causes Q2 transistor to conduct from its collector to emitter. The RL1 relay then pulls its contact closed by virtue of its coils activation. That contact closes the power loop to activate your unlocking solenoid.
The R4 and C2 time constants have been selected for activating your power relay and solenoid for enough unlock time, then the one shot circuit in the YELLOW area drops activation voltage to Q1.
( Shifting R-C values can extend or shorten the one shots circuits activation time . )
A short time later the reset circuit has the unit ready for another opening cycle.
EVALUATION . . . .
You might have problems unless you have the code WELL memorized, since this a quite secure unit with its need of precise code sequencing within a prescribed minimum amount of time.
If someone is just walking up on it cold and aspiring to open it experimentally . . . . .feeding the combinational possibilities into a KRAY and letting it crunch the numbers, one comes up with a 1,307,674,368,703 possibilities . . . and that is even being mega multiplied, far out of any comprehension, with . . . any incurred time pauses that would cause a time delayed reset .
And lets not even TALK about the cryptological shift that is occurring in the valid walking counter output state.
Nor, if you were to add even two "dummy" unconnected switches in the panels switch mix.
Nor, if you were to add additional steering diodes and set up coding for the OTHER counter stages up to its then using the final [ 10 ] output to trigger the one shot.
In that case, you would need to have the code written down (possibly backwards) and then the use of the thumb on the hand holding the paper to then sequentially be covering up the last number being punched in.
You definitely won't find me coming over to mess with your "STUFF" unless I use a "back door" stealth technique .
Thasssssssit . . . .
73's de Edd
It's a MIRACLE !
Back at your initial query time . . . I had prepped an explanatory illustration for your question.
Thereby, being ready to post it the next morn . . . . then . . . I coundn't find that PNG anywhere . . .was it trashed ?
Just now FOUND it, stored in another FOLDER, it not being so frequently used.
In the interim I see that Sir Kelly used his Eye and lightly touched opon the circuits nitty aspect . . . .now here is the
FULL gritty aspect and that is being HEAV-EE on the GRITTY . . . . . going into some real depth.
TECHNO REFERENCING:
Consult the very bottom pic initially . . . .
Then you take note of the 4017's counter reset circuit at the bottom left corner and its R1-C1 timeout elements, which acts with either the very initial 6 VDC on the powering up of the system or else, inactivity of the system, and R1-C1's shifting charge state will also initiate a reset.
Then look at the sequential steps of the entry code that have to be PRECISELY executed.
# 1 Picture . . . . . has the counter at its first state, with the now [ 0 ] being the ONLY logic HIGH that is active.
Then there are the D1-D6 steering diodes that are ONE-WAY paths for your logic voltages. The RED line path will be the only valid path for
your first combinations entry. If you press any of the 2 other switches, you will not have applied the proper logic to the input of the counter.
That gets your counter timing sequence off and you are then . . . . . . . . . . ahem . . . . . . . . . . . . . .copulated.
Now should you have chosen Door Number # 1 your RED [ 0 ] high logic can then pass thru D1 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 1 ] high logic . (The common buss sharing with D3 has no effect due to its polarity. )
# 2 Picture . . . . . has the counter at its second state, with the now RED [ 1 ] being the ONLY logic HIGH that is active. It can pass thru D2 and end up at
SW2 as being the valid switch. Since the shared buss companions of D4 and D6 are polarized so as to be non conductive, they are ignored.
The now proper press of SW2 advances the count so that RED [ 1 ] high logic can pass thru D2 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 2 ] high logic .
# 3 Picture . . . . . has the counter at its third state with the now RED [ 2 ] being the ONLY logic HIGH that is active. It can pass thru D3 and end up at
SW1 as being the valid switch. Since the shared buss companion of D1 is polarized so as to be non conductive, it is ignored. (See why they are called
" steering " diodes now ? )
The now proper press of SW1 advances the count so that RED [ 2 ] high logic can pass thru D3 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 3 ] high logic .
# 4 Picture . . . . . has the counter at its fourth state with the now RED [ 3 ] being the ONLY logic HIGH that is active. It can pass thru D4 and end up at
SW2 as being the valid switch. Since the shared buss companion of D2 and D6 are polarized so as to be non conductive, they are ignored.
The now proper press of SW2 advances the count so that RED [ 3 ] high logic can pass thru D4 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 4 ] high logic .
# 5 Picture . . . . . has the counter at its fifth state with the now RED [ 4 ] being the ONLY logic HIGH that is active. It can pass thru D5 and end up at
SW3 as being the valid switch.
The now proper press of SW3 advances the count so that RED [ 4 ] high logic can pass thru D5 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 5 ] high logic .
# 6 Picture . . . . . has the counter at its sixth state with the now RED [5] being the ONLY logic HIGH that is active. It can pass thru D6 and end up at
SW2 as being the valid switch. ( Buss companion diodes D2 and D4 are ignored.)
The now proper press of SW2 advances the count so that RED [5] high logic can pass thru D6 and gets thru to the counter input of the 4017 and causes
the count to advance to a RED [ 6 ] high logic .
BOTTOM PICTURE . . . . .
This point is where the last counter advance created a RED [ 6 ] high logic and that steady state HIGH logic travels down and enters one input of IC2c logic gate , that gates activation, along with its companion IC2d on the end . . . . (all shown within the YELLOW AREA) . . . . will create a TIMED logic HIGH at the output of the IC2d section.
That supplied voltage passes thru R5 and causes Q2 transistor to conduct from its collector to emitter. The RL1 relay then pulls its contact closed by virtue of its coils activation. That contact closes the power loop to activate your unlocking solenoid.
The R4 and C2 time constants have been selected for activating your power relay and solenoid for enough unlock time, then the one shot circuit in the YELLOW area drops activation voltage to Q1.
( Shifting R-C values can extend or shorten the one shots circuits activation time . )
A short time later the reset circuit has the unit ready for another opening cycle.
EVALUATION . . . .
You might have problems unless you have the code WELL memorized, since this a quite secure unit with its need of precise code sequencing within a prescribed minimum amount of time.
If someone is just walking up on it cold and aspiring to open it experimentally . . . . .feeding the combinational possibilities into a KRAY and letting it crunch the numbers, one comes up with a 1,307,674,368,703 possibilities . . . and that is even being mega multiplied, far out of any comprehension, with . . . any incurred time pauses that would cause a time delayed reset .
And lets not even TALK about the cryptological shift that is occurring in the valid walking counter output state.
Nor, if you were to add even two "dummy" unconnected switches in the panels switch mix.
Nor, if you were to add additional steering diodes and set up coding for the OTHER counter stages up to its then using the final [ 10 ] output to trigger the one shot.
In that case, you would need to have the code written down (possibly backwards) and then the use of the thumb on the hand holding the paper to then sequentially be covering up the last number being punched in.
You definitely won't find me coming over to mess with your "STUFF" unless I use a "back door" stealth technique .
Thasssssssit . . . .
73's de Edd
Last edited by a moderator:
Wow, thank you for all the time and effort you put into your explanation. I really appreciate it! Its helped out a lot.
