G
Geronimo Stempovski
I just read an interesting paper about high-speed I/O's power dissipation.
Unfortunately there is an equation I don't quite understand. Maybe someone
is in the mood for discussing and explaining the correctness of the equation
to me.
The formula I am talking about is (1) in the paper [
http://www.ee.ucla.edu/faculty/papers/yang-ckk_ieeeTransCircSystems2_nov2006.pdf ]
For high-common mode signaling (which standard would that be, anyway? TTL?
CMOS? SSTL?) it is assumed
P = V*Vswing/Z0 = V*Vrx/Z0*H(f)
For low-common mode signaling (LVDS? CML? LVPECL?) it states
P = Vswing^2/2*Z0 = Vrx^2/2*Z0*H(f)^2
What I don't understand is the factor 2 (2*Z0) in the calculation of the
low-common mode signaling. Furthermore I'm not sure if the H(f)^2 is
correct.
Any help is highly appreciated! Thanks a lot in advance!
Regards, Gero
Unfortunately there is an equation I don't quite understand. Maybe someone
is in the mood for discussing and explaining the correctness of the equation
to me.
The formula I am talking about is (1) in the paper [
http://www.ee.ucla.edu/faculty/papers/yang-ckk_ieeeTransCircSystems2_nov2006.pdf ]
For high-common mode signaling (which standard would that be, anyway? TTL?
CMOS? SSTL?) it is assumed
P = V*Vswing/Z0 = V*Vrx/Z0*H(f)
For low-common mode signaling (LVDS? CML? LVPECL?) it states
P = Vswing^2/2*Z0 = Vrx^2/2*Z0*H(f)^2
What I don't understand is the factor 2 (2*Z0) in the calculation of the
low-common mode signaling. Furthermore I'm not sure if the H(f)^2 is
correct.
Any help is highly appreciated! Thanks a lot in advance!
Regards, Gero