Getting crazy with PSpice and real op.amp.

[Francesco Parisi]

I have to measure the BIAS current in a uA741, by using
the following schematic:

http://img316.imageshack.us/my.php?image=opamp14ji.gif

With real instrumentation (function generator, 20 MHz scope...)
all is ok: the switch is initially closed; after some
second it's open, then in output you can see the offset
of sine signal decreasing up to take the falling sine signal
to the saturation (negative) due to integration of
the BIAS current.

Now, I have to repeat the lab with PSpice and I am not able
to reproduce it such as we did it in laboratory: in Probe
I get always a sine 1V/-1V without the "falling" effect...

I was wondering how I can to config PSpice in order to
achieve this result; I tried to chanhe various settings
with no effect. I'm using PSpice Student version.

Thanks in advance

 

[Jim Thompson]

I have to measure the BIAS current in a uA741, by using
the following schematic:

http://img316.imageshack.us/my.php?image=opamp14ji.gif

With real instrumentation (function generator, 20 MHz scope...)
all is ok: the switch is initially closed; after some
second it's open, then in output you can see the offset
of sine signal decreasing up to take the falling sine signal
to the saturation (negative) due to integration of
the BIAS current.

Now, I have to repeat the lab with PSpice and I am not able
to reproduce it such as we did it in laboratory: in Probe
I get always a sine 1V/-1V without the "falling" effect...

I was wondering how I can to config PSpice in order to
achieve this result; I tried to chanhe various settings
with no effect. I'm using PSpice Student version.

Thanks in advance

You need a device-level model. I don't know where you can get it.

...Jim Thompson

 

[Charlie Edmondson]

I have to measure the BIAS current in a uA741, by using
the following schematic:

http://img316.imageshack.us/my.php?image=opamp14ji.gif

With real instrumentation (function generator, 20 MHz scope...)
all is ok: the switch is initially closed; after some
second it's open, then in output you can see the offset
of sine signal decreasing up to take the falling sine signal
to the saturation (negative) due to integration of
the BIAS current.

Now, I have to repeat the lab with PSpice and I am not able
to reproduce it such as we did it in laboratory: in Probe
I get always a sine 1V/-1V without the "falling" effect...

I was wondering how I can to config PSpice in order to
achieve this result; I tried to chanhe various settings
with no effect. I'm using PSpice Student version.

Thanks in advance

Ok, a few points...
First, remember that your switch is not a true open/close switch, but
instead is a big resistor/little resistor switch. Since your input is
floating and has a big input resistance, it doesn't do much when it
switches on or off. Best simulation of this type is done using a Vpulse
as your source. This gives you true voltage swings, and you can then
eliminate the Tswitch and cap.

Second, there is no load to ground on your output. Different models
handle this differently, but I have seen some very 'interesting' results
when that output is floating. Put a 10K resistor to ground on the
output to protect against that.

Depending on your model, you still may not see the effect you are
looking for. The student version uses pretty simplistic models...

Charlie

 

[Francesco]

Il Fri, 09 Dec 2005 16:15:34 -0800, Charlie Edmondson ha scritto:

Depending on your model, you still may not see the effect you are
looking for. The student version uses pretty simplistic models...

But the very strange thing is that with crappy Electronics Workbench
all runs fine...I'll try to use a different circuit (integrator
without Rfeedback, with input resistor grounded).

 

[Helmut Sennewald]

Il Fri, 09 Dec 2005 16:15:34 -0800, Charlie Edmondson ha scritto:



But the very strange thing is that with crappy Electronics Workbench
all runs fine...I'll try to use a different circuit (integrator
without Rfeedback, with input resistor grounded).

Hello Francesco,

I wonder why you ignore my advice from sci.electronics.design
to use the correct switch TOPEN. Do you just want just blame
PSPICE. Sorry, but most propably it's your fault.

Garbage in -> Garbage out

The models between simulators may be too simplified, but the
uA741 from my PSPICE-Eval.lib models saturation in a useful way.

Best regards,
Helmut

 

[Ian Bell]

I have to measure the BIAS current in a uA741, by using
the following schematic:

http://img316.imageshack.us/my.php?image=opamp14ji.gif

With real instrumentation (function generator, 20 MHz scope...)
all is ok: the switch is initially closed; after some
second it's open, then in output you can see the offset
of sine signal decreasing up to take the falling sine signal
to the saturation (negative) due to integration of
the BIAS current.

Now, I have to repeat the lab with PSpice and I am not able
to reproduce it such as we did it in laboratory: in Probe
I get always a sine 1V/-1V without the "falling" effect...

I was wondering how I can to config PSpice in order to
achieve this result; I tried to chanhe various settings
with no effect. I'm using PSpice Student version.

Thanks in advance

All spice programs require a DC path to all nodes. When the switch is open
this is not the case in your circuit. You need to put a very large resistor
in parallel with the capacitor.

Ian

 

[negromonte1]

Helmut Sennewald ha scritto:

I wonder why you ignore my advice from sci.electronics.design
to use the correct switch TOPEN. Do you just want just blame
PSPICE. Sorry, but most propably it's your fault.

Hi Helmut
here my circuit with LTSpice:

Schematic:
http://img232.imageshack.us/my.php?image=ltspiceschema4xl.gif

Waveform:
http://img232.imageshack.us/img232/2923/ltspice8ua.th.gif

But the Vout waveform doesn't sailing off to the saturation.

 

[Helmut Sennewald]

Helmut Sennewald ha scritto:


Hi Helmut
here my circuit with LTSpice:

Schematic:
http://img232.imageshack.us/my.php?image=ltspiceschema4xl.gif

Waveform:
http://img232.imageshack.us/img232/2923/ltspice8ua.th.gif

But the Vout waveform doesn't sailing off to the saturation.

Hello "negromonte1",

The result depends on the features implemented in the model.
The developer of the uA741 model below has thought on saturation.
This is the model in "eval.lib" of the the PSPICE demo
version which I had installed some time ago.
I haven't looked what's in the latest demo version.

The model LM741/NS from National Semiconductor indeed
doesn't simulate saturation. They simply were too lazy
to write a good model. Now I don't wonder why Bob Pease
doesn't trust SPICE.

Best regards,
Helmut




LTspice schematic: ua741_test.asc


Version 4
SHEET 1 1140 1504
WIRE -192 288 -192 240
WIRE -192 400 -192 368
WIRE -192 528 -192 496
WIRE -192 640 -192 608
WIRE -128 240 -192 240
WIRE -128 240 -128 96
WIRE -96 96 -128 96
WIRE -96 240 -128 240
WIRE -80 160 -80 144
WIRE -32 160 -32 144
WIRE 0 96 -16 96
WIRE 0 240 -32 240
WIRE 0 240 0 96
WIRE 48 208 48 160
WIRE 80 208 48 208
WIRE 80 240 0 240
WIRE 112 192 112 16
WIRE 112 304 112 256
WIRE 112 400 112 384
WIRE 176 16 112 16
WIRE 176 32 176 16
WIRE 176 128 176 112
WIRE 176 160 48 160
WIRE 176 224 144 224
WIRE 176 224 176 160
WIRE 208 224 176 224
FLAG 112 400 0
FLAG 176 128 0
FLAG -192 400 0
FLAG -80 160 0
FLAG -32 160 vs
FLAG -192 640 0
FLAG -192 496 vs
FLAG 208 224 out
SYMBOL Opamps\\opamp2 112 160 R0
SYMATTR InstName U1
SYMATTR Value uA741
SYMBOL voltage 112 288 R0
SYMATTR InstName V1
SYMATTR Value -15
SYMBOL voltage 176 16 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -192 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1.00 1k)
SYMBOL cap -96 256 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL sw -112 96 R270
SYMATTR InstName S1
SYMATTR Value SW1
SYMBOL voltage -192 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(1 0 2m 1n 1n 100)
TEXT -208 -48 Left 0 !.model sw1 sw(Ron=1 Roff=1e10 Vt=0.5)
TEXT -208 -80 Left 0 !.tran 500m
TEXT -208 -112 Left 0 !.include ua741_from_eval.lib





The model file "ua741_from_eval.lib".



* ua741_from_eval.lib
* Sample standard device library
*
* Copyright 1994-1995 by MicroSim Corporation
* Neither this library nor any part may be copied without the express
* written consent of MicroSim Corporation
*
* $Revision: 1.33 $
* $Author: rbh $
* $Date: 22 Jul 1997 16:42:58 $
*
*---------------------------------------------------------------------------
--
* connections: non-inverting input
* | inverting input
* | | positive power supply
* | | | negative power supply
* | | | | output
* | | | | |
..subckt uA741 1 2 3 4 5
*
c1 11 12 8.661E-12
c2 6 7 30.00E-12
dc 5 53 dx
de 54 5 dx
dlp 90 91 dx
dln 92 90 dx
dp 4 3 dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb 7 99 poly(5) vb vc ve vlp vln 0 10.61E6 -10E6 10E6 10E6 -10E6
ga 6 0 11 12 188.5E-6
gcm 0 6 10 99 5.961E-9
iee 10 4 dc 15.16E-6
hlim 90 0 vlim 1K
q1 11 2 13 qx
q2 12 1 14 qx
r2 6 9 100.0E3
rc1 3 11 5.305E3
rc2 3 12 5.305E3
re1 13 10 1.836E3
re2 14 10 1.836E3
ree 10 99 13.19E6
ro1 8 5 50
ro2 7 99 100
rp 3 4 18.16E3
vb 9 0 dc 0
vc 3 53 dc 1
ve 54 4 dc 1
vlim 7 8 dc 0
vlp 91 0 dc 40
vln 0 92 dc 40
..model dx D(Is=800.0E-18 Rs=1)
..model qx NPN(Is=800.0E-18 Bf=93.75)
..ends
*$

 

[Charles Schuler]

Now I don't wonder why Bob Pease

Does not trust simulation ... Bob is a VERY practical engineer ... too few
of his ilk are around now a days!

 

[Helmut Sennewald]

Hello "negromonte1",

The result depends on the features implemented in the model.
The developer of the uA741 model below has thought on saturation.
This is the model in "eval.lib" of the the PSPICE demo
version which I had installed some time ago.
I haven't looked what's in the latest demo version.

Hello I checked now with the ORCAD 10.0 demo version.
I have modified the circuit because I couldn't find the switch TOPEN.
Instead I used the normal voltage controlled switch.
The value of Roff in the switch has to be changed to 1e10 Ohm.
The default is only 1e6 Ohm which is by far too low for this test setup.
The simulation results have been as expected after these changes,

I have to admit that this test setup may not work with many
opamp models, because they may be often made for operation
within the commmon mode range.

Best regards,
Helmut