C
colin
Hi,
Im using 2 QEI rotary encoders at the moment,
one at each end of a long shaft and im comparing the two.
each 2000PPR running at 10krpm.
im looking to improve on my current setup wich shows about 5ps resolution
averaged over a few days.
atm im doing this fairly well with a dspic33,
just uses input capture to timestamp each edge of one signal from each
encoder.
however I'm thinking of having 2 encoders at each end
one on either side of the same encoder disc,
so that any radial play can be compensated for,
wich I think is the biggest cuase of my error/noise.
the dspic only has 2 capture inputs
So im thinking its time to move to a fgpa,
considering you can implement a cpu in one of the large ones
am assuming this will be well within the capabilities.
however ive not used more than the little ones before now,
a decade or so ago before I moved into software.
all I need to do is measure the difference in relative position between the
two ends.
however its not as simple as first seems, a small amount of eccentricity
seems inevitable,
therefore this difference can vary by many counts as the shaft rotates
between any two encoders, so doing it with simple pulse width measurers is
unworkable,
I dont think trying to get the mechanical precision necessary is feasable
either,
unless I reduce the number of pulses considerably.
with timestamping this isnt too dificult.
but atm im only timestamping two signals and ignoring errors.
however I wish to monitor both the A and B and also the index of each
encoder
so thats 12 signals, obviously with a pic this was too much,
but with a fpga I hope to be able to count proper direction counts rather
than just edges,
and reject any errors by checking the count with the index.
so I need 4 QEI encoders, wich probably isnt too dificult,
and some logic to average the difference over 1 cycle,
this is the tricky part, as any encoder can be more than 1 cycle ahead.
so I gues I could have FIFO's for each QEI wich stores a timestamp for each
forward advance in position
and just do the comparison when all 4 are non empty.
again this doesnt sound too difficult either.
plus some simple cpu interface and some status/control registers etc.
probably need a 24bit wide timer.
I asume this is all easily feasable in one chip,
so what would be a good system/device to start with ?
and any pointers to implementing it more easily ?
maybe someone will suggest a 12bit state machine ...
probably a module would be best as I expect any IC would be tricky to use on
homemade pcb,
as they all seem to have high pin density packages,
although I probably only need to use 20 pins or so.
a 100mhz clock would probably be fine.
I gues I could even put the cpu onto the fpga as well,
the only other thing it does is sine PWM BLDC motor control.
it drives a 1/4vga bitmapped LCD too but I can forgo that as it was mainly
for debug.
then just sends the data via rs232 blutooth module to the PC.
thanks
Colin =^.^=
Im using 2 QEI rotary encoders at the moment,
one at each end of a long shaft and im comparing the two.
each 2000PPR running at 10krpm.
im looking to improve on my current setup wich shows about 5ps resolution
averaged over a few days.
atm im doing this fairly well with a dspic33,
just uses input capture to timestamp each edge of one signal from each
encoder.
however I'm thinking of having 2 encoders at each end
one on either side of the same encoder disc,
so that any radial play can be compensated for,
wich I think is the biggest cuase of my error/noise.
the dspic only has 2 capture inputs
So im thinking its time to move to a fgpa,
considering you can implement a cpu in one of the large ones
am assuming this will be well within the capabilities.
however ive not used more than the little ones before now,
a decade or so ago before I moved into software.
all I need to do is measure the difference in relative position between the
two ends.
however its not as simple as first seems, a small amount of eccentricity
seems inevitable,
therefore this difference can vary by many counts as the shaft rotates
between any two encoders, so doing it with simple pulse width measurers is
unworkable,
I dont think trying to get the mechanical precision necessary is feasable
either,
unless I reduce the number of pulses considerably.
with timestamping this isnt too dificult.
but atm im only timestamping two signals and ignoring errors.
however I wish to monitor both the A and B and also the index of each
encoder
so thats 12 signals, obviously with a pic this was too much,
but with a fpga I hope to be able to count proper direction counts rather
than just edges,
and reject any errors by checking the count with the index.
so I need 4 QEI encoders, wich probably isnt too dificult,
and some logic to average the difference over 1 cycle,
this is the tricky part, as any encoder can be more than 1 cycle ahead.
so I gues I could have FIFO's for each QEI wich stores a timestamp for each
forward advance in position
and just do the comparison when all 4 are non empty.
again this doesnt sound too difficult either.
plus some simple cpu interface and some status/control registers etc.
probably need a 24bit wide timer.
I asume this is all easily feasable in one chip,
so what would be a good system/device to start with ?
and any pointers to implementing it more easily ?
maybe someone will suggest a 12bit state machine ...
probably a module would be best as I expect any IC would be tricky to use on
homemade pcb,
as they all seem to have high pin density packages,
although I probably only need to use 20 pins or so.
a 100mhz clock would probably be fine.
I gues I could even put the cpu onto the fpga as well,
the only other thing it does is sine PWM BLDC motor control.
it drives a 1/4vga bitmapped LCD too but I can forgo that as it was mainly
for debug.
then just sends the data via rs232 blutooth module to the PC.
thanks
Colin =^.^=
