does silk screen affect vias on the board?

[at89atbits]

Hi,
I am getting a stop mask error for placing a via on the tplace layer of another component.
But I dont need to solder anything on the via.
So do I need to change the placement of the via or placing the via on the silkscreen won't be a problem.
I am attaching an image of the error for reference.

 

[davenn]

quite possibly
I always make sure any silk screen text or component symbols do not cover vias
regardless of if they have a component leg through them or not

cheers
Dave

 

[Arouse1973]

Daves right you never know when you might need to connect to a non tented via if you have connection errors.
Adam

 

[garublador]

I'm not familiar with that software. Does that via have a solder mask opening or is it covered up (i.e. will the pad for the via be exposed)? If it's covered then there probably isn't an issue. The board house will just put silk over the solder mask. If you want to get to the via later on you'll have to scrap the mask and silk off. If it isn't covered then the board house will either ask you about it or just not put silk screen over the exposed via pad.

 

[davenn]

If you want to get to the via later on you'll have to scrap the mask and silk off.

That's why I design the silkscreen so it doesn't cover any holes ... no need for scraping and making a nice looking board look rough at a later date

Dave

 

[dablakh0l]

Is it the silkscreen that is causing the error, or possibly the component under the DRC error window has a 'keepout' area that is really causing the error?

 

[garublador]

Another option is to just manually remove the silk screen in that area. It's not like you won't know what that silk screen represents if there's a tiny bit missing out of it.