Differential pairs at 5 MHz - how important is trace length?

[[email protected]]

All,

My design includes a differential amplifier cascaded pair at 20 kHz to
5 MHz. The amplifer I am using is the AD8331. I have routed the
signals differentially through, the differential pairs mostly reside
on the top layer and layer 3 (between ground layers)

From what I have heard online, it appears that trace lengths in
differential routing is very important - however how much impact does
it have under 5 MHz. It appears that my routes are are around 20/30
mils mismatch, though I am trying to reduce it.

Also, my signals route from the top layer (where the ICs are) to layer
3 through vias and mostly travel through layer 3. but occassionaly
come up to the top layer to the ICs. I am not sure if this is good
practice or if there can be problems associated. Now, is there a
guideline for differential pairs to be on the top or internal layer?
Is there a good book or a resource that can throw more light on this?

Thanks

Ray

 

[[email protected]]

All,

My design includes a differential amplifier cascaded pair at 20 kHz to
5 MHz. The amplifer I am using is the AD8331. I have routed the
signals differentially through, the differential pairs mostly  reside
on the top layer and layer 3 (between ground layers)

From what I have heard online, it appears that trace lengths in
differential routing is very important  - however how much impact does
it have under 5 MHz. It appears that my routes are are around 20/30
mils mismatch, though I am trying to reduce it.

Also, my signals route from the top layer (where the ICs are) to layer
3 through vias and mostly travel through layer 3. but occassionaly
come up to the top layer to the ICs. I am not sure if this is good
practice or if there can be problems associated. Now, is there a
guideline for differential pairs to be on the top or internal layer?
Is there a good book or a resource that can throw more light on this?

Electromagnetic radiation travels about 1 foot (30cm) per nanosecond
in a vacuum, and at about 8 inches (20cm) per nanosecond in FR4. Your
5MHz frequency has a wavelenght of 200 feet in a vaccuum and about 130
feet on you printed circuit board. 20/30 mills of mismatch is unlikely
to be all that important.

If you are going to bother regarding your printed circuit board traces
as transmission lines, you should aim to lay them out to have a
constant impedance.

Buried traces are called "stripline"

http://www.microwaves101.com/encyclopedia/stripline.cfm

and offer a lower characteristic impedance (for the same trace width)
as "microstrip" running over the outer surface of the board. They are
also better screened.

http://www.bay-technology.com/striplinedata.htm

Having a track pop up to the outer layer to connect to an integrated
circuit does create a small impedance discontinuity, but a much
smaller discontinuity than that created by the capacitance to ground
at the integrated circuit input.

One time when I was feeling excessively perfectionist, I narrowed my
traces for about 2cm around an integrated circuit input to compensate
for the extra capacitance - I was tracking in a 200MHz clock and it
was almost certainly a complete waste of time.

 

[Joerg]

All,

My design includes a differential amplifier cascaded pair at 20 kHz to
5 MHz. The amplifer I am using is the AD8331. I have routed the
signals differentially through, the differential pairs mostly reside
on the top layer and layer 3 (between ground layers)

From what I have heard online, it appears that trace lengths in
differential routing is very important - however how much impact does
it have under 5 MHz. It appears that my routes are are around 20/30
mils mismatch, though I am trying to reduce it.

As Bill pointed out it's not going to make much of a difference.

Also, my signals route from the top layer (where the ICs are) to layer
3 through vias and mostly travel through layer 3. but occassionaly
come up to the top layer to the ICs. I am not sure if this is good
practice or if there can be problems associated. Now, is there a
guideline for differential pairs to be on the top or internal layer?
Is there a good book or a resource that can throw more light on this?

The AD8331 is a hotrod, it can do >40dB at 100MHz. So you need to make
sure that the input traces don't "see" too much of the output or it
could oscillate. Other than that routing on top would only be an EMI
issue if that's of any concern here.

 

[[email protected]]

As Bill pointed out it's not going to make much of a difference.


The AD8331 is a hotrod, it can do >40dB at 100MHz. So you need to make
sure that the input traces don't "see" too much of the output or it
could oscillate. Other than that routing on top would only be an EMI
issue if that's of any concern here.

Joerg,

Thanks for the advice. It appears you are familiar with the 8331. At 5
Mhz or less, I get the feeling that controlled impedance lines are not
going to matter much. Have you used this in a differential format and
done any contolled impedance or without controlled impedance boards?

 

[Joerg]

Joerg,

Thanks for the advice. It appears you are familiar with the 8331. At 5
Mhz or less, I get the feeling that controlled impedance lines are not
going to matter much. Have you used this in a differential format and
done any contolled impedance or without controlled impedance boards?

I haven't used this chip on a circuit board yet. Too expensive or, as
Jim T. would say, I am a cheapskate when it comes to circuit design. But
I did use the uA733 which is also differential. The situations where I'd
place controlled impedance traces are mostly for really long traces all
across a backplane and stuff like that. Especially since it costs
nothing and we don't even need to grab the old slide rule any longer:

http://emclab.mst.edu/pcbtlc2/index.html

 

[Tom Bruhns]

Electromagnetic radiation travels about 1 foot (30cm) per nanosecond
in a vacuum, and at about 8 inches (20cm) per nanosecond in FR4. Your
5MHz frequency has a wavelenght of 200 feet in a vaccuum and about 130
feet on you printed circuit board. 20/30 mills of mismatch is unlikely
to be all that important.

If you are going to bother regarding your printed circuit board traces
as transmission lines, you should aim to lay them out to have a
constant impedance.

Buried traces are called "stripline"

http://www.microwaves101.com/encyclopedia/stripline.cfm

and offer a lower characteristic impedance (for the same trace width)
as "microstrip" running over the outer surface of the board. They are
also better screened.

http://www.bay-technology.com/striplinedata.htm

Having a track pop up to the outer layer to connect to an integrated
circuit does create a small impedance discontinuity, but a much
smaller discontinuity than that created by the capacitance to ground
at the integrated circuit input.

One time when I was feeling excessively perfectionist, I narrowed my
traces for about 2cm around an integrated circuit input to compensate
for the extra capacitance - I was tracking in a 200MHz clock and it
was almost certainly a complete waste of time.

Small point: "FR4" is pretty generic. The relative dielectric
constant can be anything over a pretty large range from a bit less
than 4 to maybe 5 or a bit more. I have some in front of me that I
measured at about 4.8 yesterday, and I have some boards made with
Isola 370HR that's rated at just about 4.0. Anyway, in the 4.8
material, I expect a velocity factor no higher than .57 for a
microstrip on the surface, but for a stripline, it will be 1/sqrt(4.8)
= .456. So, instead of 20 cm/ns for microstrip, I'd expect more like
17 cm/nsec, and for things buried in the dielectric, it'll be less
than 15 cm/ns (13.6 for my 4.8 dielectric constant material). The
variability in dielectric constant of FR4 also means that it's tough
to get good accuracy on trace impedance, unless you specify a
particular substrate material.

Cheers,
Tom