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Damage if IC pins more negative than substrate?

M

Mark Aitchison

I understand that the diodes intrinsic to integrated circuits, with
anodes to the substrate, are relatively easily damaged by excessive
current when pins are brought more negative than the ground/V-/Vee pin.
I don't see specifications for the maximum current in most data
sheets; does anybody know whether it is safe to assume all ICs (well,
opamps, timers, etc) will tolerate a milliamp?


Mark.
 
N

Nermal

When I do a pin-to-pin curve tracer characterization I limit current to
+- 100 uA. I have never blown the substrate/protection diode. This
also goes for driving an input or output junction more positive than the
+ supply bus.
 
A

Al

Nermal said:
When I do a pin-to-pin curve tracer characterization I limit current to
+- 100 uA. I have never blown the substrate/protection diode. This
also goes for driving an input or output junction more positive than the
+ supply bus.

If the negative voltage on a pin is present before Vcc or Vdd is
applied, the device may go into latch-up and be damaged. Most modern
IC's are protected agains latch-up, but you should do your own test on
each batch you use to be sure.

BTW, when I was doing Failure Analysis, I limited the curver-tracer
current to +/- 10 uA.

Al
 
N

Nermal

I saw a lot of latch-up damage when a vendor came out with an "improved
and smaller" die. The old product was immune to latch-up. Our product
and design could not be changed: all of the CMOS devices had to operate
ir regardless of the power up sequence. We had to go to a different
manufacturer for this device (Quad CMOS analog switch). The new vendors
product was latch-up proof but very susceptible to EDS.

I still use +- 100 uA or even more for my pin-to-pin characterization
prior to decapsulation. I like to know what kind of damage I will see
before I expose the die (most of the parts now days are plastic).

The old RCA CMOS line could survive many mA of forward and reverse
voltage in the input pins. This was discovered when RCA went out of
business and we had to go with a new vendor (Harris Semiconductor). The
same devices were now failing due to blown input metallization runs.
The new vendors metallization was much thinner. We had to redesign our
circuits to limit current to the input pins to < 10 mA.
 
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