C
Chris Carlen
Hi:
First I implemented a classic PWM circuit in LTSpice to drive a
solenoid. A B source is presently used to measure the current through
the solenoid since it is referenced to the positive supply. In the real
circuit, if I build it, I will likely flip it around to have a PMOS
switch and high-side driver, and put the solenoid above a current sense
resistor to ground to make the control circuit easier.
The current sense B source goes to an error amp, and I can step a
reference voltage and the solenoid average current neatly tracks the
reference, with rise and fall times of the current as expected given the
inductance and resistance of the solenoid model.
Then I thought it should be possible to use current mode control, as I
have recently learned to do with the ZVS flyback project.
So I cobbled together a somewhat abstracted current mode control again
using the B source to measure the coil current. Lo and behold it worked
right away!
But current mode is a bit trickier to understand. In my ZVS, the error
amp outputs a rather calm threshold, which bounces around a little bit
with the output ripple, but is certainly not bang-bang.
But in my solenoid drive, the error amp is bang-bang. This doesn't seem
to matter much as the results are correct. At first I had no
integration capacitor and just relied on high error amp gain and
bandwidth, which certainly leads to bang-bang. And with no integration
the average inductor current didn't exactly equal the reference, because
I am measuring the actual inductor current for negative feedback, but
setting the threshold of the positive current ramps only. So the
circuit basically controlled so that the peak current levels of the
inductor tracked the reference.
Then I stuck an integrating cap in there, and that made the average
inductor current track the reference exactly.
First of all let me just say that current mode is really neat!
With an integrating cap, the output of the error amp became very
complex. Partially bang-bang, and partially a wiggly thing that wasn't
quite to the rails. I have done no stability analysis, just pulling
high frequency gain and ingration time constant values of of thin air,
cut and try 'till it works.
But it works very well. If there is no rule against bang-banging like
this, I will switch to the practical issues of choosing real circuits to
do what I have abstracted to some degree in SPICE.
Would anyone consider an NMOS drive with positive supply referenced load
in this sort of thing? This would necessitate some sort of differential
amplifier with very high common-mode voltage range to monitor the
solenoid current. The positive supply here is likely to be 50-150V.
Alternatively, I would use PMOS and a high-side driver. I still need a
differential amp to see the rising and falling coil current inside the
damper zener loop, since this will have to be on top of the positive
ramp current sense resistor that will be grounded. But this
differential amp needn't have high common mode voltage range.
I may have to use a ground referenced load because the solenoid may be
rated to handle up to 150V or so to ground, but not the 300V that it
sees right now when the FET is off.
Am I on the right track here? See LTSpice .asc file and plain SPICE
netlist below, for folks who don't have the free LTSpice installed,
which should run on any SPICE with a few minor incompatibility adjustments.
Ok, good day!
----------------------------------------------------------
Version 4
SHEET 1 1628 680
WIRE 16 -48 16 -16
WIRE -320 0 -320 -32
WIRE -208 0 -208 -32
WIRE -320 -112 -320 -160
WIRE -208 -112 -208 -160
WIRE 528 128 432 128
WIRE 1008 304 1008 144
WIRE 1008 64 1008 -16
WIRE 1008 -272 576 -272
WIRE 576 -272 576 -240
WIRE 576 -160 576 -128
WIRE 576 -48 576 -16
WIRE 688 -16 576 -16
WIRE 576 -16 576 48
WIRE 848 -16 752 -16
WIRE 912 -16 1008 -16
WIRE 1008 -16 1008 -272
WIRE 576 352 576 384
WIRE 576 272 576 224
WIRE -384 240 -176 240
WIRE 16 336 16 304
WIRE -464 240 -384 240
WIRE -384 112 -384 240
WIRE -608 112 -656 112
WIRE -656 112 -656 224
WIRE -656 224 -528 224
WIRE -608 256 -528 256
WIRE -688 224 -656 224
WIRE -608 416 -608 384
WIRE -608 304 -608 256
WIRE -496 208 -496 176
WIRE -496 176 -480 176
WIRE -496 272 -496 304
WIRE -496 304 -480 304
WIRE -1072 416 -1072 384
WIRE -1072 304 -1072 224
WIRE -880 416 -880 368
WIRE -1008 224 -1072 224
WIRE -928 224 -880 224
WIRE -880 224 -880 304
WIRE -880 224 -768 224
WIRE 224 128 352 128
WIRE 128 256 128 208
WIRE 16 64 16 128
WIRE 16 128 128 128
WIRE 16 224 16 176
WIRE 16 176 128 176
WIRE 656 224 576 224
WIRE 576 224 576 144
WIRE 736 224 768 224
WIRE 768 224 768 288
WIRE 768 352 768 384
WIRE -176 240 -48 240
WIRE 768 224 848 224
WIRE -480 112 -528 112
WIRE -416 112 -384 112
FLAG 16 -48 0
FLAG -320 0 0
FLAG -208 0 0
FLAG -320 -160 Vpos
FLAG -208 -160 Vneg
FLAG 576 384 0
FLAG 1008 304 0
FLAG 16 336 0
FLAG -608 416 0
FLAG -480 176 Vpos
FLAG -480 304 Vneg
FLAG -1072 416 0
FLAG -880 416 0
FLAG 128 256 0
FLAG 768 384 0
FLAG -176 240 Ithresh
FLAG 848 224 Isense
SYMBOL voltage 16 80 R180
WINDOW 3 -358 204 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 24 104 Left 0
SYMATTR Value PULSE(0 5 0 20n 20n 100n 20u)
SYMATTR InstName V1
SYMBOL voltage -320 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -208 -16 R180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res 560 -144 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL ind 560 -256 R0
SYMATTR InstName L1
SYMATTR Value 0.002
SYMBOL res 336 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL nmos 528 48 R0
SYMATTR InstName M1
SYMATTR Value Si4490DY
SYMBOL voltage 1008 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 150
SYMBOL res 560 256 R0
SYMATTR InstName R3
SYMATTR Value 0.033
SYMBOL diode 848 0 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D2
SYMATTR Value MURS320
SYMBOL bv 16 208 R0
WINDOW 3 -60 200 Left 0
SYMATTR Value V=limit({Cgain}*(v(Isense)-v(Ithresh)),v(Vneg),v(Vpos))
SYMATTR InstName B1
SYMBOL res -624 128 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL res -784 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL voltage -608 288 R0
WINDOW 3 -515 226 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0.000001 1.0 0.001 1.0 0.001001 3.0 0.002 3.0 0.002001
2.0 0.003 2.0 0.003001 0)
SYMATTR InstName V2
SYMBOL zener 752 -32 R90
WINDOW 0 -4 32 VBottom 0
WINDOW 3 36 32 VTop 0
SYMATTR InstName D1
SYMATTR Value Zen
SYMBOL Opamps\\2pole -496 240 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=100Meg Slew=10Meg
SYMBOL bv -1072 288 R0
SYMATTR InstName B2
SYMATTR Value V=0.1*i(L1)
SYMBOL res -1024 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL cap -896 304 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL Digital\\srflop 176 80 R0
SYMATTR InstName A1
SYMATTR SpiceModel SRFLOP(Trise=20n Vhigh=10 Ref=2.5)
SYMBOL res 640 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL cap 752 288 R0
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap -480 128 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C3
SYMATTR Value 100p
TEXT 310 562 Left 0 !.tran 0 4m 0 100n
TEXT -24 448 Left 0 !.param Cgain=1E4
TEXT 696 -200 Left 0 !.ic i(L1)=0
TEXT 560 -328 Left 0 !.model Zen D(Vfwd=1 Ron=0.1 Vrev=149)
----------------------------------------------------------
* Y:\spice\LT-SWcad\solenoid.drive\exp-6.asc
V1 N012 0 PULSE(0 5 0 20n 20n 100n 20u)
V3 Vpos 0 10
V4 0 Vneg 5
R1 N003 N004 2
L1 N002 N003 0.002
R2 N011 N001 10
M1 N004 N001 N006 N006 Si4490DY
V5 N002 0 150
R3 N006 0 0.033
D2 N005 N002 MURS320
B1 N013 0 V=limit({Cgain}*(v(Isense)-v(Ithresh)),v(Vneg),v(Vpos))
R5 N007 N014 1Meg
R6 N010 N007 10k
V2 N008 0 PWL(0.000001 1.0 0.001 1.0 0.001001 3.0 0.002 3.0 0.002001 2.0
0.003 2.0 0.003001 0)
D1 N005 N004 Zen
X§U1 N008 N007 Vpos Vneg Ithresh 2pole Avol=1Meg GBW=100Meg Slew=10Meg
ilimit=25m rail=0 Vos=0 phimargin=45 en=0 enk=0 in=0 ink=0
B2 N009 0 V=0.1*i(L1)
R4 N009 N010 100
C1 N010 0 1p
A1 N012 N013 0 0 0 0 N011 0 SRFLOP(Trise=20n Vhigh=10 Ref=2.5)
R7 N006 Isense 1k
C2 Isense 0 4.7n
C3 N014 Ithresh 100p
..model D D
..lib C:\Program Files\LTC\SwCADIII\lib\cmp\standard.dio
..model NMOS NMOS
..model PMOS PMOS
..lib C:\Program Files\LTC\SwCADIII\lib\cmp\standard.mos
..tran 0 4m 0 100n
..param Cgain=1E4
..ic i(L1)=0
..model Zen D(Vfwd=1 Ron=0.1 Vrev=149)
..lib 2pole.sub
..backanno
..end
----------------------------------------------------------
--
_______________________________________________________________________
Christopher R. Carlen
Principal Laser/Optical Technologist
Sandia National Laboratories CA USA
[email protected] -- NOTE: Remove "BOGUS" from email address to reply.
First I implemented a classic PWM circuit in LTSpice to drive a
solenoid. A B source is presently used to measure the current through
the solenoid since it is referenced to the positive supply. In the real
circuit, if I build it, I will likely flip it around to have a PMOS
switch and high-side driver, and put the solenoid above a current sense
resistor to ground to make the control circuit easier.
The current sense B source goes to an error amp, and I can step a
reference voltage and the solenoid average current neatly tracks the
reference, with rise and fall times of the current as expected given the
inductance and resistance of the solenoid model.
Then I thought it should be possible to use current mode control, as I
have recently learned to do with the ZVS flyback project.
So I cobbled together a somewhat abstracted current mode control again
using the B source to measure the coil current. Lo and behold it worked
right away!
But current mode is a bit trickier to understand. In my ZVS, the error
amp outputs a rather calm threshold, which bounces around a little bit
with the output ripple, but is certainly not bang-bang.
But in my solenoid drive, the error amp is bang-bang. This doesn't seem
to matter much as the results are correct. At first I had no
integration capacitor and just relied on high error amp gain and
bandwidth, which certainly leads to bang-bang. And with no integration
the average inductor current didn't exactly equal the reference, because
I am measuring the actual inductor current for negative feedback, but
setting the threshold of the positive current ramps only. So the
circuit basically controlled so that the peak current levels of the
inductor tracked the reference.
Then I stuck an integrating cap in there, and that made the average
inductor current track the reference exactly.
First of all let me just say that current mode is really neat!
With an integrating cap, the output of the error amp became very
complex. Partially bang-bang, and partially a wiggly thing that wasn't
quite to the rails. I have done no stability analysis, just pulling
high frequency gain and ingration time constant values of of thin air,
cut and try 'till it works.
But it works very well. If there is no rule against bang-banging like
this, I will switch to the practical issues of choosing real circuits to
do what I have abstracted to some degree in SPICE.
Would anyone consider an NMOS drive with positive supply referenced load
in this sort of thing? This would necessitate some sort of differential
amplifier with very high common-mode voltage range to monitor the
solenoid current. The positive supply here is likely to be 50-150V.
Alternatively, I would use PMOS and a high-side driver. I still need a
differential amp to see the rising and falling coil current inside the
damper zener loop, since this will have to be on top of the positive
ramp current sense resistor that will be grounded. But this
differential amp needn't have high common mode voltage range.
I may have to use a ground referenced load because the solenoid may be
rated to handle up to 150V or so to ground, but not the 300V that it
sees right now when the FET is off.
Am I on the right track here? See LTSpice .asc file and plain SPICE
netlist below, for folks who don't have the free LTSpice installed,
which should run on any SPICE with a few minor incompatibility adjustments.
Ok, good day!
----------------------------------------------------------
Version 4
SHEET 1 1628 680
WIRE 16 -48 16 -16
WIRE -320 0 -320 -32
WIRE -208 0 -208 -32
WIRE -320 -112 -320 -160
WIRE -208 -112 -208 -160
WIRE 528 128 432 128
WIRE 1008 304 1008 144
WIRE 1008 64 1008 -16
WIRE 1008 -272 576 -272
WIRE 576 -272 576 -240
WIRE 576 -160 576 -128
WIRE 576 -48 576 -16
WIRE 688 -16 576 -16
WIRE 576 -16 576 48
WIRE 848 -16 752 -16
WIRE 912 -16 1008 -16
WIRE 1008 -16 1008 -272
WIRE 576 352 576 384
WIRE 576 272 576 224
WIRE -384 240 -176 240
WIRE 16 336 16 304
WIRE -464 240 -384 240
WIRE -384 112 -384 240
WIRE -608 112 -656 112
WIRE -656 112 -656 224
WIRE -656 224 -528 224
WIRE -608 256 -528 256
WIRE -688 224 -656 224
WIRE -608 416 -608 384
WIRE -608 304 -608 256
WIRE -496 208 -496 176
WIRE -496 176 -480 176
WIRE -496 272 -496 304
WIRE -496 304 -480 304
WIRE -1072 416 -1072 384
WIRE -1072 304 -1072 224
WIRE -880 416 -880 368
WIRE -1008 224 -1072 224
WIRE -928 224 -880 224
WIRE -880 224 -880 304
WIRE -880 224 -768 224
WIRE 224 128 352 128
WIRE 128 256 128 208
WIRE 16 64 16 128
WIRE 16 128 128 128
WIRE 16 224 16 176
WIRE 16 176 128 176
WIRE 656 224 576 224
WIRE 576 224 576 144
WIRE 736 224 768 224
WIRE 768 224 768 288
WIRE 768 352 768 384
WIRE -176 240 -48 240
WIRE 768 224 848 224
WIRE -480 112 -528 112
WIRE -416 112 -384 112
FLAG 16 -48 0
FLAG -320 0 0
FLAG -208 0 0
FLAG -320 -160 Vpos
FLAG -208 -160 Vneg
FLAG 576 384 0
FLAG 1008 304 0
FLAG 16 336 0
FLAG -608 416 0
FLAG -480 176 Vpos
FLAG -480 304 Vneg
FLAG -1072 416 0
FLAG -880 416 0
FLAG 128 256 0
FLAG 768 384 0
FLAG -176 240 Ithresh
FLAG 848 224 Isense
SYMBOL voltage 16 80 R180
WINDOW 3 -358 204 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 24 104 Left 0
SYMATTR Value PULSE(0 5 0 20n 20n 100n 20u)
SYMATTR InstName V1
SYMBOL voltage -320 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -208 -16 R180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res 560 -144 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL ind 560 -256 R0
SYMATTR InstName L1
SYMATTR Value 0.002
SYMBOL res 336 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL nmos 528 48 R0
SYMATTR InstName M1
SYMATTR Value Si4490DY
SYMBOL voltage 1008 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 150
SYMBOL res 560 256 R0
SYMATTR InstName R3
SYMATTR Value 0.033
SYMBOL diode 848 0 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D2
SYMATTR Value MURS320
SYMBOL bv 16 208 R0
WINDOW 3 -60 200 Left 0
SYMATTR Value V=limit({Cgain}*(v(Isense)-v(Ithresh)),v(Vneg),v(Vpos))
SYMATTR InstName B1
SYMBOL res -624 128 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL res -784 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL voltage -608 288 R0
WINDOW 3 -515 226 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0.000001 1.0 0.001 1.0 0.001001 3.0 0.002 3.0 0.002001
2.0 0.003 2.0 0.003001 0)
SYMATTR InstName V2
SYMBOL zener 752 -32 R90
WINDOW 0 -4 32 VBottom 0
WINDOW 3 36 32 VTop 0
SYMATTR InstName D1
SYMATTR Value Zen
SYMBOL Opamps\\2pole -496 240 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=100Meg Slew=10Meg
SYMBOL bv -1072 288 R0
SYMATTR InstName B2
SYMATTR Value V=0.1*i(L1)
SYMBOL res -1024 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL cap -896 304 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL Digital\\srflop 176 80 R0
SYMATTR InstName A1
SYMATTR SpiceModel SRFLOP(Trise=20n Vhigh=10 Ref=2.5)
SYMBOL res 640 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL cap 752 288 R0
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap -480 128 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C3
SYMATTR Value 100p
TEXT 310 562 Left 0 !.tran 0 4m 0 100n
TEXT -24 448 Left 0 !.param Cgain=1E4
TEXT 696 -200 Left 0 !.ic i(L1)=0
TEXT 560 -328 Left 0 !.model Zen D(Vfwd=1 Ron=0.1 Vrev=149)
----------------------------------------------------------
* Y:\spice\LT-SWcad\solenoid.drive\exp-6.asc
V1 N012 0 PULSE(0 5 0 20n 20n 100n 20u)
V3 Vpos 0 10
V4 0 Vneg 5
R1 N003 N004 2
L1 N002 N003 0.002
R2 N011 N001 10
M1 N004 N001 N006 N006 Si4490DY
V5 N002 0 150
R3 N006 0 0.033
D2 N005 N002 MURS320
B1 N013 0 V=limit({Cgain}*(v(Isense)-v(Ithresh)),v(Vneg),v(Vpos))
R5 N007 N014 1Meg
R6 N010 N007 10k
V2 N008 0 PWL(0.000001 1.0 0.001 1.0 0.001001 3.0 0.002 3.0 0.002001 2.0
0.003 2.0 0.003001 0)
D1 N005 N004 Zen
X§U1 N008 N007 Vpos Vneg Ithresh 2pole Avol=1Meg GBW=100Meg Slew=10Meg
ilimit=25m rail=0 Vos=0 phimargin=45 en=0 enk=0 in=0 ink=0
B2 N009 0 V=0.1*i(L1)
R4 N009 N010 100
C1 N010 0 1p
A1 N012 N013 0 0 0 0 N011 0 SRFLOP(Trise=20n Vhigh=10 Ref=2.5)
R7 N006 Isense 1k
C2 Isense 0 4.7n
C3 N014 Ithresh 100p
..model D D
..lib C:\Program Files\LTC\SwCADIII\lib\cmp\standard.dio
..model NMOS NMOS
..model PMOS PMOS
..lib C:\Program Files\LTC\SwCADIII\lib\cmp\standard.mos
..tran 0 4m 0 100n
..param Cgain=1E4
..ic i(L1)=0
..model Zen D(Vfwd=1 Ron=0.1 Vrev=149)
..lib 2pole.sub
..backanno
..end
----------------------------------------------------------
--
_______________________________________________________________________
Christopher R. Carlen
Principal Laser/Optical Technologist
Sandia National Laboratories CA USA
[email protected] -- NOTE: Remove "BOGUS" from email address to reply.
