Capacitive reactance affecting voltage divider output

[Rajinder]

Hi all
I have attached a circuit diagram, which although not complete gives an idea to a issue i am having and trying to find a solution too.

I have a sounder element with capacitance of C1 and C2. The total capacitance is 1/c1 + 1/c2 + 1/c3
This works out to 3.47nF.
At 4KHz (resonant frequency) of the buzzer, the capacative reactance is 11.532K.
This is effecting the voltage output of my potential divider.
Is there any thing i can do to solve this?
Perhaps a parallel capacitor to reduce the Xc at the desired frequency?

I look forward to any suggestions.
Thanks in advance.

 

[Harald Kapp]

No attachment.

 

[Harald Kapp]

The total capacitance is 1/c1 + 1/c2 + 1/c3

Capacitances don't add up that way.
In parallel it's: Ctotal = C1+C2+C3+...
In series it's: 1/Ctotal = 1/C1+1/C2+1/C3+...

Is there any thing i can do to solve this?

Use frequency compensation.

 

[Rajinder]

Hi
The capacitors are in series. Which total to 3.47nF. Please could you elaborate on frequency compensation. Are you saying to operate at a different frequency?

 

[Rajinder]

Here is the attachment.

 

[Rajinder]

I really need the circuit to operate at 4KHz if i can. But may be able to drive off frequency as a last resort.

 

[Harald Kapp]

Please could you elaborate on frequency compensation.

Please read the article linked in post #3.

You calculation of the series capacitance is wrong.

 

[hevans1944]

I look forward to any suggestions.

(1) Try using the correct equation for capacitors connected in series, as @Harald Kapp suggested in his post #3. The correct formula is the reciprocal of the sum of the reciprocal capacitances, NOT the sum of the reciprocal capacitances as you mistakenly stated.

(2) Provide the actual values for capacitances C1, C2, and C3 and NOT the BS value of 3.47 nF that you mis-calculated... or was this a measured value that you threw in to confuse the issue?

(3) Please clarify your diagram from post #5. Are C1 and C2 in parallel (not series) as shown on your diagram? What is the meaning of the dotted lines on the diagram? What is the purpose of the resistive divider? What is a "sounder" and how is it excited (powered)? What is the purpose of C3?

(4) Please tell us WTF you are trying to do. Let us advise you on how to do it.

 

[Rajinder]

Hi
Sorry for the confusion.
The capacitor values are c1 30nF, c2 3nF and c3 220nF.
The sounder is a piezo.
Sorry yes, c1 and c2 are in parallel which combined are in series with c3.
When the piezo sounds a voltage is available at the junction of potential divider.
However, if i have a piezo wire broken i still get the voltage ie indicating it is connected.
The potential divider is used to determine if the piezo is present ir removed or one of the wires is broken.
Thanks

 

[Rajinder]

Any suggestions would be appreciated.
Sorry for the confusion.

 

[hevans1944]

Please answer my questions (3) and (4) in post #8. What are the two capacitances C1 and C2? Why are they in parallel? What do these two capacitances represent? What is the purpose of the 3V at the top of your diagram? How is power applied to the piezo sounder to make it operate? Does is require 3 V DC to operate? There is no DC current path in your diagram.

 

[Rajinder]

The capacitors represent the capacitance of the feedback gnd and supply of the piezo.
This is a friends diagram, thats all he has given me. I think there is a auto transformer to up the voltage to drive the piezo driven from a PIC.

I was trying to help the only thing i thought of was the capacitive reactance causing the issues he was noticing.

 

[Harald Kapp]

Without a correct schematic diagram and complete information what the circuit is supposed to do and what it does instead we will not be of much help to you.

 

[Audioguru]

A piezo beeper has its own oscillator built into it. It oscillates at its resonant frequency when it is powered from DC.
But you said the piezo is driven from a PIC (40kHz signal, not DC?) then the piezo is a transducer. A piezo transducer has one capacitance, not two like you show.

Your circuit divides the voltage signal fed to the piezo but I think you want to measure the current fed to the piezo so that the PIC frequency can be adjusted to the resonant frequency of the piezo transducer and its enclosure.

Instead of all this circuit, use a piezo with a built in oscillator.

 

[FuZZ1L0G1C]

 

[hevans1944]

The capacitors represent the capacitance of the feedback gnd and supply of the piezo. ...

What does this even mean? What is "the feedback gnd and supply of the piezo?"

... This is a friends diagram, thats all he has given me. I think there is a auto transformer to up the voltage to drive the piezo driven from a PIC.

I was trying to help the only thing i thought of was the capacitive reactance causing the issues he was noticing.

It's nice that you are trying to "help" your friend, but coming here and presenting isolated bits and pieces of the puzzle doesn't help anyone and is a huge FWOOT.

So, you have revealed that a PIC microcontroller is somehow involved, and you think an auto transformer is somehow used "to up the voltage to drive the piezo ... from a PIC." Well, good for him! Howsabout a schematic diagram of the entire contraption, including parts identification via symbol (R1, R2 ... C1, C2 ... Q1, Q2 ... etc.) and by value (100 Ω, 2K7 Ω ... 100 nF, 0.1 μF ... 2N3904, 2N3055 ... etc.)? That would be a good start.

A listing of the code used to program the PIC, heavily annotated with comments to reveal what the code is supposed to do, would help to move things along. And just what IS the problem that your friend is trying to solve? What issues is he having? Why do you feel in any way qualified to help?

Is the piezo transducer a self-contained unit that makes noise when a DC voltage is applied, or does it require a rapidly varying DC or AC signal at its resonant frequency to be applied? Who manufactures the piezo sounder and where was it purchased? Does it have model number? Why is there a resistive divider connected in series with a capacitor, the sounder, and a 3 V supply?

 

[73's de Edd]

I knews FWIW . . .but had to look up FWOOT !

 

[hevans1944]

I knews FWIW . . .but had to look up FWOOT !

I inserted an extra "O" to make it "Waste Of Our Time" because there have been many responders playing "what if" games on this thread. I apologize for the additional confusion, but this thread is still, IMHO, a FWOT though.

 

[Rajinder]

Hi all
I apologise for the lack of information. It is all i was told so please do not get angry with me.
If i could amswer a question on similar lines, forget the circuit (or lack of it above).
If i had a potential divider (say 10K and 10K) and a capacitor connected to the top resistor. Again using an example, if the reactance at 4KHz of the capacitor was 20K. Then i would have a potential divider of 30K (top) and 20K (bottom). This will effect the voltage divider output.
So please could anyone give me a few suggestions on how i could overcome this.
Thankyou.

 

[hevans1944]

...give me a few suggestions on how i could overcome this.

Depending on your goal, and why you placed the capacitor in series with the voltage divider, if your desire is to minimize the capacitive reactance effect of the capacitor on the resistive voltage divider, then you will require as large a capacitance as possible. Allowing |X_c| = 1 / (2 π f C) to approach zero by arbitrarily increasing C without bound would accomplish that goal, but you must also consider the effect of whatever source impedance is driving the series combination of the capacitor and the two resistors, as well as whatever load impedance is in parallel with the lower divider resistor. All this will involve the arithmetic of complex numbers, which clearly you do not seem to understand yet because of your incorrect statement:

...if the reactance at 4KHz of the capacitor was 20K. Then i would have a potential divider of 30K (top) and 20K (bottom).

Reactance is not the same as resistance, and you cannot simply add 20 kΩ capacitive reactance to 10 kΩ ohmic resistance to obtain 30 kΩ to use in the DC voltage divider equation. The AC voltage divider equation is V_out = V_in [ Z_lower / ( Z_lower + Z_upper ) ]. Impedances are complex numbers and their arithmetic is different than the arithmetic used with real numbers.

A capacitor in series with a resistor has an impedance, |Z_effective| = [X_c² + R²]^1/2. The voltage divider output is NOT V_out = V_in [ R_lower / (R_lower + R_upper + X_c) ]. Instead V_out = V_in [ R_lower / ( R_lower + Z_effective ) ]. The addition of R_lower and Z_effective in the denominator is a complex number addition, and the fraction R_lower / (R_upper + Z_effective) is a complex number.

I will ask again one final time: WTF are you trying to DO?