Basic questions about digital phase locked loop

[[email protected]]

Hey, everyone,

Hope you are doing great!

I just started learning about digital phase locked loop. I have a lot
of things that I cannot figure out. It will be great if I can get some
answers from here.

In the textbook,

The gain of the voltage controlled oscillator is

Kvco = 2 x Pi x (fmax - fmin) / (Vmax - Vmin)

The VCO output frequency, f clock, is related to the VCO input voltage
by

W clock = 2 x Pi x fclock = Kvco x Vinvco + W0

Where W0 is a constant. However, the variable we are feeding back is
not frequency but phase ( hence the name of the circuit). The phase of
the VCO clock output is related to fclock by


The integration of Wclock = Kvco x Vinvco / jw

Here, I do not understand that why the integration of the Wclock is
equal to Kvco x Vinvco / jw.

If I do Laplace transform on the integration of the Wclock, then I
will get 1/ jw x Laplace transform of Kvco x Vinvco. And since these
two are constant, the laplace transform will be Kvco x Vinvco / s.
Hence the Laplace transform of the integration of Wclock will be Kvco x
Vinvco / square of s. Here in the book, I do not think they are talking
about taking a Laplace transform. And even they are taking Laplace
transform, my answer will be Kvco x Vinvco / square of s. Not Kvco x
Vinvco /s.

Do you have any idea here, please?

2. I can understand the equation about the natual frequency and damping
factor. The book also
just gives me the equations about pull in range, lock time, lock range.
However, there is no deduction for these equations at all.

Specifically, the pull in range is

Pi/2 x square root of ( 2 x damping ratio x natual frequency x Kvco x
Kpd - the square of natural frequency )

Here Kpd is the gain of phase detector.

The lock time is 2 x Pi / natual frequency.

The lock range is Pi / 2 x (1/ R x C ) , here R and C is the resistor
and capacitor value of the low pass filter.

I have no idear how these equations are deducted.

Thanks for reading this post and any answers are greatly appreciated.
Sarah

 

[Andrew Holme]

Hey, everyone,

Hope you are doing great!

I just started learning about digital phase locked loop. I have a lot
of things that I cannot figure out. It will be great if I can get some
answers from here.

In the textbook,

The gain of the voltage controlled oscillator is

Kvco = 2 x Pi x (fmax - fmin) / (Vmax - Vmin)

The VCO output frequency, f clock, is related to the VCO input voltage
by

W clock = 2 x Pi x fclock = Kvco x Vinvco + W0

Where W0 is a constant. However, the variable we are feeding back is
not frequency but phase ( hence the name of the circuit). The phase of
the VCO clock output is related to fclock by


The integration of Wclock = Kvco x Vinvco / jw

Here, I do not understand that why the integration of the Wclock is
equal to Kvco x Vinvco / jw.

See http://www.holmea.demon.co.uk/Ethernet/PLLQA.htm

 

[Don Lancaster]

Hey, everyone,

Hope you are doing great!

I just started learning about digital phase locked loop. I have a lot
of things that I cannot figure out. It will be great if I can get some
answers from here.

In the textbook,

The gain of the voltage controlled oscillator is

Kvco = 2 x Pi x (fmax - fmin) / (Vmax - Vmin)

The VCO output frequency, f clock, is related to the VCO input voltage
by

W clock = 2 x Pi x fclock = Kvco x Vinvco + W0

Where W0 is a constant. However, the variable we are feeding back is
not frequency but phase ( hence the name of the circuit). The phase of
the VCO clock output is related to fclock by


The integration of Wclock = Kvco x Vinvco / jw

Here, I do not understand that why the integration of the Wclock is
equal to Kvco x Vinvco / jw.

If I do Laplace transform on the integration of the Wclock, then I
will get 1/ jw x Laplace transform of Kvco x Vinvco. And since these
two are constant, the laplace transform will be Kvco x Vinvco / s.
Hence the Laplace transform of the integration of Wclock will be Kvco x
Vinvco / square of s. Here in the book, I do not think they are talking
about taking a Laplace transform. And even they are taking Laplace
transform, my answer will be Kvco x Vinvco / square of s. Not Kvco x
Vinvco /s.

Do you have any idea here, please?

2. I can understand the equation about the natual frequency and damping
factor. The book also
just gives me the equations about pull in range, lock time, lock range.
However, there is no deduction for these equations at all.

Specifically, the pull in range is

Pi/2 x square root of ( 2 x damping ratio x natual frequency x Kvco x
Kpd - the square of natural frequency )

Here Kpd is the gain of phase detector.

The lock time is 2 x Pi / natual frequency.

The lock range is Pi / 2 x (1/ R x C ) , here R and C is the resistor
and capacitor value of the low pass filter.

I have no idear how these equations are deducted.

Thanks for reading this post and any answers are greatly appreciated.
Sarah

The key secret is that frequency (when definible) is the rate of change
of phase.

--
Many thanks,

Don Lancaster voice phone: (928)428-4073
Synergetics 3860 West First Street Box 809 Thatcher, AZ 85552
rss: http://www.tinaja.com/whtnu.xml email: [email protected]

Please visit my GURU's LAIR web site at http://www.tinaja.com

 

[Genome]

Hey, everyone,

Hope you are doing great!

I have no idea how these equations are deducted.

Thanks for reading this post and any answers are greatly appreciated.
Sarah

Hello Sarah from the University of Cincinnati.....

I'm shit myself but that seems normal.

You might need to ignore the mathematical analysis and wave your hands and
brane about. I'm not certain about this but there is a good chance that the
VCO only sort of behaves as an integrator within the loop when it is
combined with the phase detector...... and the loop is stable.

I think you might find the 'botched' small signal maths takes a 'short cut'
and stuffs the integration in the VCO term and gives you an answer that
works...... for a small signal analysis.

Outside of that the overall 'loop', which has the filter in it, gives you
stuff like the range (lock, pull in... large signal.... Squegging) things.
It's a bit incestuous.

Start out by having a think about how the 'average' output of your phase
detector varies according to the difference between your reference frequency
and your VCO frequency without feedback. The phase detector is really some
sort of mixer.

Long term, without the loop closed it's going to be all over the place. With
the loop closed it might just get to the right answer.....

Yes, I have been bullshitting.

DNA

 

[Jim Thompson]

Hello Sarah from the University of Cincinnati.....

I'm shit myself but that seems normal.

You might need to ignore the mathematical analysis and wave your hands and
brane about. I'm not certain about this but there is a good chance that the
VCO only sort of behaves as an integrator within the loop when it is
combined with the phase detector...... and the loop is stable.

I think you might find the 'botched' small signal maths takes a 'short cut'
and stuffs the integration in the VCO term and gives you an answer that
works...... for a small signal analysis.

Outside of that the overall 'loop', which has the filter in it, gives you
stuff like the range (lock, pull in... large signal.... Squegging) things.
It's a bit incestuous.

Start out by having a think about how the 'average' output of your phase
detector varies according to the difference between your reference frequency
and your VCO frequency without feedback. The phase detector is really some
sort of mixer.

Long term, without the loop closed it's going to be all over the place. With
the loop closed it might just get to the right answer.....

Yes, I have been bullshitting.

DNA

DNA's comments written out in "maths"....

http://analog-innovations.com/SED/PhaseLockedLoopAnalysis.pdf

If I hadn't gained a scholarship to MIT, the University of Cincinnati
was one of my fall-back plans, particularly since it was only 150
miles away from home (Huntington, WV).

...Jim Thompson

 

[Tim Wescott]

Hey, everyone,

Hope you are doing great!

I just started learning about digital phase locked loop. I have a lot
of things that I cannot figure out. It will be great if I can get some
answers from here.

In the textbook,

What textbook?

The gain of the voltage controlled oscillator is

Kvco = 2 x Pi x (fmax - fmin) / (Vmax - Vmin)

That looks right, although it's not very 'digital'.

The VCO output frequency, f clock, is related to the VCO input voltage
by

W clock = 2 x Pi x fclock = Kvco x Vinvco + W0

Where W0 is a constant.

Good so far.

However, the variable we are feeding back is
not frequency but phase ( hence the name of the circuit). The phase of
the VCO clock output is related to fclock by


The integration of Wclock = Kvco x Vinvco / jw

Here, I do not understand that why the integration of the Wclock is
equal to Kvco x Vinvco / jw.

It isn't. See below.

If I do Laplace transform on the integration of the Wclock, then I
will get 1/ jw x Laplace transform of Kvco x Vinvco. And since these
two are constant, the laplace transform will be Kvco x Vinvco / s.
Hence the Laplace transform of the integration of Wclock will be Kvco x
Vinvco / square of s. Here in the book, I do not think they are talking
about taking a Laplace transform. And even they are taking Laplace
transform, my answer will be Kvco x Vinvco / square of s. Not Kvco x
Vinvco /s.

Do you have any idea here, please?

I have an idea that you needed to pay more attention in your signals
class, and that you're confusing signals with systems. Vinvco is a
signal which is being acted on by an integrator. You don't _know_
Vinvco's Laplace transform up front, you only know that a time-domain
integrator acts to to multiply that Laplace transform by 1/s in the
frequency domain.

2. I can understand the equation about the natual frequency and damping
factor. The book also
just gives me the equations about pull in range, lock time, lock range.
However, there is no deduction for these equations at all.

Specifically, the pull in range is

Pi/2 x square root of ( 2 x damping ratio x natual frequency x Kvco x
Kpd - the square of natural frequency )

Here Kpd is the gain of phase detector.

The lock time is 2 x Pi / natual frequency.

The lock range is Pi / 2 x (1/ R x C ) , here R and C is the resistor
and capacitor value of the low pass filter.

I have no idear how these equations are deducted.

Thanks for reading this post and any answers are greatly appreciated.
Sarah

"Phase Locked Loop Circuit Design" by Wolaver gives a very good
discussion of the lock-in process, including approximate equations for a
number of phase detectors (and yes, lock in is _heavily_ influenced by
the phase detector).

By the way: where does the 'digital' come in? All I see is traditional
PLL circuits stuff here.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Posting from Google? See http://cfaj.freeshell.org/google/

"Applied Control Theory for Embedded Systems" came out in April.
See details at http://www.wescottdesign.com/actfes/actfes.html