Bad output from 74HC165?

[Bart T.]

Hi,

I'm using a 74HC165 shift register in a circuit with 2 other HC ICs
that interfaces to the parallel port. The inputs to the 165 are from a
flip flop which is working fine, but I'm not able to get the 165 to
work for some reason.

I have /CE (clock enable) tied to ground, /PL (parallel load) and CLK
are hooked up to individual parallel port lines. It appears as though
the chip doesn't want to perform the parallel load and I've measured
the output (Q7) voltage to be around 2.7V, which, IIRC, is invalid for
CMOS. It doesn't seem to change with clock pulses which is strange.

Could it be that the chip is bad? Or, am I doing the parallel load
wrong? Here's the C code I'm using:

OUTP(pport, _PARALLEL_LOAD(1) | _OUTPUT_CLOCK(0));
OUTP(pport, _PARALLEL_LOAD(0) | _OUTPUT_CLOCK(0));
OUTP(pport, _PARALLEL_LOAD(1) | _OUTPUT_CLOCK(1));

And then I read the data. The interface to the parallel port is
working correctly because I'm able to successfully drive a 74HC164 and
273 without any problems. It's just the 165 that's not working.

Any ideas on what could be wrong?

Thanks,

 

[Amos Ku]

I have /CE (clock enable) tied to ground, /PL (parallel load) and CLK

are hooked up to individual parallel port lines. It appears as though
the chip doesn't want to perform the parallel load and I've measured
the output (Q7) voltage to be around 2.7V, which, IIRC, is invalid for
CMOS.

How did you measure it? With it in the circuit or have it disconnected
from the next stage. Remember that the load in your next stage
may lower the voltage drop (Did you send to signal to drive many other
chips?).


It doesn't seem to change with clock pulses which is strange.

Could it be that the chip is bad?

Don't know. It seems that you may have a bad chip. Is this your own design
or a chip from a product you have bought?

Or, am I doing the parallel load

wrong? Here's the C code I'm using:

Please post a rather complete schematic so people will see where the
problem is. Thank you.

 

[Bart T.]

Thank you for responding!

How did you measure it? With it in the circuit or have it disconnected
from the next stage. Remember that the load in your next stage
may lower the voltage drop (Did you send to signal to drive many other
chips?).

I perform all my measurements online (that is, as the circuit is
working.) I force signals to slow down to 1 per every second or two
(using software time delays) so I can observe what's happening.

Don't know. It seems that you may have a bad chip. Is this your own design
or a chip from a product you have bought?

It's a Texas Instruments 74HC165.

Please post a rather complete schematic so people will see where the
problem is. Thank you.

I'm at work right now so I don't have the schematic handy, but I think
last night I managed to isolate the problem. The chip isn't bad, it's
something to do with my connection to the parallel port. I can post
the schematic later if it's still required.

The output pin is connected to a data pin on the parallel port. No
pull up or pull down resistors are used. With this connection in
place, the voltage just sits there at 2.7V as measured between the
output pin and ground. But, if I remove the connection to the parallel
port, the device seems to start functioning! I see it alternate
between 5.7V and 0 as it should.

So, the problem is the parallel port connection. It is not a problem
with the wire or the port itself, I've determined, but rather my
understanding of how to interface to it. I've tried a 2.2k-ohm pull up
and pull down, neither did anything. I did some searching and found
this page:

http://www.repairfaq.org/filipg/LINK/PORTS/F_PARALLEL14.html

In the 6th paragraph of chapter 3, it mentions the CONTROL lines
should be set high by software (to put them in a floating state) and
then they can be read (because the output device at the other end will
drive them properly.) So I guess I should try writing a 1 to the input
port before reading it? I'll do this as soon as I get home but I still
have a feeling it won't work :/ BTW, I'm using the data lines (D7-D0)
not the control lines, but it's the same thing.

I don't get why the parallel port is interfering with the chip output.

 

[Bart T.]

Some more information: I just noticed that the output of the chip is
still bad even when the connection to the parallel port is severed. It
has the correct voltage levels but the logical behavior is wrong.

If I disable reading from the parallel port in my code, then the
output is correct (again, as long as the connection to the parallel
port is not made.) I don't understand this at all. The other chips
work just fine, including a 74HC164 shift register.

What exactly happens during a parallel port read and how is it likely
to be interfering with my circuit? It only seems to be affecting the
'165.