Hi,
I'm developing a circuit to produce a 100Hz output from a steady 5Hz input pulse.
To do this I'm using a HEF4046 phase locked loop chip and divide by 20 feedback provided by a 74HC390 ic. (5Hz x 20 = 100Hz)
The circuit takes a few seconds to settle but then produces a steady 100Hz signal. The phase comparator output gets smaller and smaller as it settles and locks to the input. After about one minute the phase comparator output is close to zero and then all of a sudden it goes totally out of sync even though the 5Hz input is still there as steady as ever. It then repeats the process of locking to the input signal as though it had just been switched on again.
It's almost as though it needs a phase difference/error between the 5Hz input and the feedback signal to continue working correctly and without one it goes unstable.
Any ideas what's going wrong here?
Regards,
Dave.
I'm developing a circuit to produce a 100Hz output from a steady 5Hz input pulse.
To do this I'm using a HEF4046 phase locked loop chip and divide by 20 feedback provided by a 74HC390 ic. (5Hz x 20 = 100Hz)
The circuit takes a few seconds to settle but then produces a steady 100Hz signal. The phase comparator output gets smaller and smaller as it settles and locks to the input. After about one minute the phase comparator output is close to zero and then all of a sudden it goes totally out of sync even though the 5Hz input is still there as steady as ever. It then repeats the process of locking to the input signal as though it had just been switched on again.
It's almost as though it needs a phase difference/error between the 5Hz input and the feedback signal to continue working correctly and without one it goes unstable.
Any ideas what's going wrong here?
Regards,
Dave.
