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4 bit BCD to 7 segment decoder circuit

Hi, I've been tasked with an assignment, I've basically got to build a circuit that will take a 4 bit BCD input for the numbers 0-9 and output the correct number to the 7 segment display. I've only just started at uni after time out from college and i'm struggling abit.

Ive managed to do a truth table and the Karnaugh maps for each of the 7 segments to minimise the logic expressions, but that's as far as ive got, when I try to convert the expression to NAND it wont simulate correctly so I assume im doing something simple wrong but I just cant see it.

I'm struggling converting the expressions to 2 input nand gate circuits, could someone help me with this one below which is for LED A.

I'm using proteus to build and simulate the circuits but I cant successfully convert it to NAND only and for it to work correctly. Any pointers or help will be much appreciated!!

Many thanks
Chris
 

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Harald Kapp

Moderator
Moderator
Your equation seems to be correct with respect to the Karnaugh table given - although you could have saved terms by looking at the equation for not(a).

Show us the result of your exercise in converting the equation to NAND logic, so we can discuss it.
Start from the equivalence A+B = NOT(NOT(A) AND (NOT(B)). Apply this repeatedly.

Note that NAND only requires you to simulate NOT(x) by a NAND gate. There are two equivalent ways to do this.
 
OK thanks, when I get home ill post a picture of what I converted the expression, I didn't bring it to work with me. Cheers for the help, once I can do letter a and know the method and understand it I can then progress through all of my other maps :) Ill be back later
 
Heres my worked out version to nand gates, i dont think there should be the bars over the first 3 expressions. Below is a 4 input nand gate using 2 input nand gates only but im pretty sure its not as simple as just connecting the inputs to it like that , any help is appreciated, im about to pull my hair out!

Thanks
 

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Harald Kapp

Moderator
Moderator
Apply the transformation A+B = NOT(NOT(A) AND (NOT(B)) step by step to get:

upload_2016-1-20_8-0-26.png

Use the same method for the other segments.
 
Thanks for the reply so how would that look as two input nand gates to get the output? Do the two bars over A cancel out or is it not A as one of the inputs into the logic?
 

Harald Kapp

Moderator
Moderator
Do the two bars over A cancel out or
No, as the upper bar spans more than one term. You'll have to closely exam which terms are spanned by a bar
Using (unnecessary) parentheses, the equation looks like this:
upload_2016-1-20_13-54-4.png
You can now clearly discern the NAND functions by the grouping parentheses.

The expression contains 2* 2-input NAND and 1*3-input NAND + 4*Inverter.
 
Right so that statement is NOT A and NOT C and NOT B AND D AND B AND D into a 4 input nand gate?

I can make a 4 input nand gate using 2 input nand gates which I have to use as per my assignment. Ill draw it out in now in proteus and try to simulate it.

Thanks Harald
 
Heres where I am, i managed to simulate the circuit successfully no problem, could you show me the steps with the bar then I can apply it to the other segments.

I used
NOT A
NOT B
B AND D
NOT A AND B

Is that correct, the single bar ober B.D is just B and D as an input?

Thanks
 

Harald Kapp

Moderator
Moderator
So double barover an expression like NOT(NOT B and NOT D) cancels out then I assume so it it just B and D, is that right?
No, wrong. Set up the truth table to find out. NOT(NOT(A)) will cancel, but NOT(NOT(A) AND NOT(B)) is something else..
 
No, wrong. Set up the truth table to find out. NOT(NOT(A)) will cancel, but NOT(NOT(A) AND NOT(B)) is something else..

Could you show me please, im really struggling with this as I though id cracked 'segment a'

I put the 'segment a' logic from the expression earlier into into a 4 input nand gate and it workes using:

NOT A
NOT B
B AND D
NOT A AND B
 

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Like my segment b seems to be working according to my truth table when i simulate it, but after going through what you have been saying to me herald i cant help but feel they are wrong (segment a and segment b) surely I cant have been that lucky that both simulate ok?!?
 

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I think you will like this video it will help you a lot.
at the start ,and then don't miss at 11:35 on

I wish I had this kind of help when I started...;)
 
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Ah right so Not(not A and Not B) is inverted?

Could you check out my circuits/algebra conversions for segments a and b im still struggling with that and the pressure is on. Have i just been lucky that they both work or have i comfigured them correctly.

Thanks for the help!!
 

Harald Kapp

Moderator
Moderator
Ah right so Not(not A and Not B) is inverted?
Inverting is what NOT() is for :confused:

Could you check out my circuits/algebra conversions for segments a and b im still
Sorry, I do not have the time for this. Your karnaugh map for segment a seems to be correct (see post #2), what needs to be done is the conversion to a NAND form for implementation.
You can use any online "boolean algebra calculator " (search terms) to verify your equations. E.g. this one.
 
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